OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [branches/] [stable_0_1_x/] [or1ksim/] [peripheral/] [mc.c] - Rev 1768

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5769d 18h /or1k/branches/stable_0_1_x/or1ksim/peripheral/mc.c
1356 This commit was manufactured by cvs2svn to create branch 'stable_0_1_x'. 7258d 06h /or1k/branches/stable_0_1_x/or1ksim/peripheral/mc.c
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7259d 23h /or1k/branches/stable_0_1_x/or1ksim/peripheral/mc.c
1308 Gyorgy Jeney: extensive cleanup phoenix 7464d 17h /or1k/branches/stable_0_1_x/or1ksim/peripheral/mc.c
997 PRINTF should be used instead of printf; command redirection repaired markom 8161d 08h /or1k/branches/stable_0_1_x/or1ksim/peripheral/mc.c
970 Testbench is now running on ORP architecture platform. simons 8168d 19h /or1k/branches/stable_0_1_x/or1ksim/peripheral/mc.c
804 memory regions can now overlap with MC -- not according to MC spec markom 8297d 03h /or1k/branches/stable_0_1_x/or1ksim/peripheral/mc.c
742 Added status info dump. ivang 8322d 05h /or1k/branches/stable_0_1_x/or1ksim/peripheral/mc.c
545 Fixed mc_read_word() bug! ivang 8387d 23h /or1k/branches/stable_0_1_x/or1ksim/peripheral/mc.c
543 Memory controller fixed. simons 8388d 02h /or1k/branches/stable_0_1_x/or1ksim/peripheral/mc.c
539 Missing parts added. simons 8388d 06h /or1k/branches/stable_0_1_x/or1ksim/peripheral/mc.c
344 added acv test for uart; sim debug now has verbose levels; lot of bugs fixed in uart model markom 8443d 05h /or1k/branches/stable_0_1_x/or1ksim/peripheral/mc.c
261 modified memory accesses; added cfg script; added pic test basic entry of vga; some extensions to mc markom 8455d 07h /or1k/branches/stable_0_1_x/or1ksim/peripheral/mc.c
239 added enviroment configuration script parser markom 8463d 08h /or1k/branches/stable_0_1_x/or1ksim/peripheral/mc.c

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.