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[/] [or1k/] [branches/] [stable_0_1_x/] [or1ksim/] [testbench/] [int_test.S] - Rev 1765

Rev	Log message	Author	Age	Path
1765		root	5562d 21h	/or1k/branches/stable_0_1_x/or1ksim/testbench/int_test.S
1356	This commit was manufactured by cvs2svn to create branch 'stable_0_1_x'.		7051d 10h	/or1k/branches/stable_0_1_x/or1ksim/testbench/int_test.S
970	Testbench is now running on ORP architecture platform.	simons	7961d 22h	/or1k/branches/stable_0_1_x/or1ksim/testbench/int_test.S
956	Changed to work with or32-uclinux tool chain. Everything works except keyboard test.	simons	7964d 04h	/or1k/branches/stable_0_1_x/or1ksim/testbench/int_test.S
802	Cache and tick timer tests fixed.	simons	8094d 11h	/or1k/branches/stable_0_1_x/or1ksim/testbench/int_test.S
619	all test pass, after newest changes	markom	8161d 10h	/or1k/branches/stable_0_1_x/or1ksim/testbench/int_test.S
600	No more low/high priority interrupts (PICPR removed). Added tick timer exception.	simons	8169d 21h	/or1k/branches/stable_0_1_x/or1ksim/testbench/int_test.S
576	some risc test added	markom	8174d 06h	/or1k/branches/stable_0_1_x/or1ksim/testbench/int_test.S