URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [branches/] [stable_0_1_x/] [or1ksim/] [testbench/] [mc_sync.c] - Rev 1775

Rev	Log message	Author	Age	Path
1765		root	5755d 05h	/or1k/branches/stable_0_1_x/or1ksim/testbench/mc_sync.c
1356	This commit was manufactured by cvs2svn to create branch 'stable_0_1_x'.		7243d 17h	/or1k/branches/stable_0_1_x/or1ksim/testbench/mc_sync.c
1024	Mess with printf/PRINTF fixed. Ethernet test changed to support latest changes.	simons	8134d 16h	/or1k/branches/stable_0_1_x/or1ksim/testbench/mc_sync.c
997	PRINTF should be used instead of printf; command redirection repaired	markom	8146d 19h	/or1k/branches/stable_0_1_x/or1ksim/testbench/mc_sync.c
552	Added option to read configuration from MC. Fixed bugs in address calculation.	ivang	8372d 12h	/or1k/branches/stable_0_1_x/or1ksim/testbench/mc_sync.c
544	Added GPIO output for progress indication for FPGA simulation.	ivang	8373d 12h	/or1k/branches/stable_0_1_x/or1ksim/testbench/mc_sync.c
471	Removed MC initialization. Must be done in except_mc.S	ivang	8393d 19h	/or1k/branches/stable_0_1_x/or1ksim/testbench/mc_sync.c
454	MC Tests.	ivang	8398d 14h	/or1k/branches/stable_0_1_x/or1ksim/testbench/mc_sync.c