OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [branches/] [stable_0_2_x/] [or1ksim/] [Makefile.am] - Rev 1765

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5765d 06h /or1k/branches/stable_0_2_x/or1ksim/Makefile.am
1646 This commit was manufactured by cvs2svn to create branch 'stable_0_2_x'. 6912d 09h /or1k/branches/stable_0_2_x/or1ksim/Makefile.am
1353 Modularise simulator command parsing nogj 7255d 11h /or1k/branches/stable_0_2_x/or1ksim/Makefile.am
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7255d 11h /or1k/branches/stable_0_2_x/or1ksim/Makefile.am
1242 Added "cm" command to copy data inside memory.
Make or1ksim work on little endian platforms.
Port to Mac OS X.
Some bugfixes.
Allow JTAG write access to read-only memory regions.		 hpanther 7627d 15h /or1k/branches/stable_0_2_x/or1ksim/Makefile.am
1075 channels integration rprescott 8091d 08h /or1k/branches/stable_0_2_x/or1ksim/Makefile.am
879 Initial version of OpenRISC Custom Unit Compiler added markom 8206d 13h /or1k/branches/stable_0_2_x/or1ksim/Makefile.am
646 some bugs fixed markom 8355d 16h /or1k/branches/stable_0_2_x/or1ksim/Makefile.am
632 profiler and mprofiler merged into sim. ivang 8361d 08h /or1k/branches/stable_0_2_x/or1ksim/Makefile.am
547 memory profiler added markom 8382d 20h /or1k/branches/stable_0_2_x/or1ksim/Makefile.am
306 corrected lots of bugs markom 8444d 19h /or1k/branches/stable_0_2_x/or1ksim/Makefile.am
241 "make install" now works markom 8458d 20h /or1k/branches/stable_0_2_x/or1ksim/Makefile.am
221 major changes to testbench; debug unit is moved to /debug; memory organization can be customized; UART from simons; overall cleanup markom 8459d 18h /or1k/branches/stable_0_2_x/or1ksim/Makefile.am
173 - profiler added, use e.g.:
make profiler
./sim -profile -fast executable
./profiler -g [-c]

(no special compiling options necessary)		 markom 8530d 23h /or1k/branches/stable_0_2_x/or1ksim/Makefile.am
123 Bugs fixed:
- l.rfe temporarly disables exceptions
- l.sys does PC -= 4
- breakpoints now supported at peripheria locations
- uart0.rt/.tx nonexistent file segment fault

Other modifications:
- replaced string names to instruction indexes
- execute.c executes specified (in ISA table) function
- modified ISA table - flag needed for gdb
- added or32.c, which supports or32.h
- added new instructions l.mac, l.msb, l.maci, l.macrc
and their executing functions (opcodes to be revisited)
- added header acconfig.h
- modified configuration files		 markom 8593d 16h /or1k/branches/stable_0_2_x/or1ksim/Makefile.am
103 Major update to include PM, PIC, Cache Mngmnt and non-interactive mode. lampret 8619d 00h /or1k/branches/stable_0_2_x/or1ksim/Makefile.am
92 Tick timer. lampret 8664d 07h /or1k/branches/stable_0_2_x/or1ksim/Makefile.am
30 Updated SPRs, exceptions. Added 16450 device. lampret 8965d 06h /or1k/branches/stable_0_2_x/or1ksim/Makefile.am
28 Adding COFF loader. lampret 8980d 04h /or1k/branches/stable_0_2_x/or1ksim/Makefile.am
7 Major update of the enviorment. Now uses autoconf and automake. The
simulator uses readline aswell to get input from the user. A number of
new files added, some modified. The libc directory is now called support.		 jrydberg 9059d 13h /or1k/branches/stable_0_2_x/or1ksim/Makefile.am

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.