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[/] [or1k/] [branches/] [stable_0_2_x/] [or1ksim/] [bpb/] [branch_predict.c] - Rev 1765

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1765 root 5766d 03h /or1k/branches/stable_0_2_x/or1ksim/bpb/branch_predict.c
1646 This commit was manufactured by cvs2svn to create branch 'stable_0_2_x'. 6913d 06h /or1k/branches/stable_0_2_x/or1ksim/bpb/branch_predict.c
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7247d 05h /or1k/branches/stable_0_2_x/or1ksim/bpb/branch_predict.c
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7256d 08h /or1k/branches/stable_0_2_x/or1ksim/bpb/branch_predict.c
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7269d 12h /or1k/branches/stable_0_2_x/or1ksim/bpb/branch_predict.c
1243 Added "cm" command to copy data inside memory.
Make or1ksim work on little endian platforms.
Port to Mac OS X.
Some bugfixes.
Allow JTAG write access to read-only memory regions.		 hpanther 7628d 11h /or1k/branches/stable_0_2_x/or1ksim/bpb/branch_predict.c
997 PRINTF should be used instead of printf; command redirection repaired markom 8157d 17h /or1k/branches/stable_0_2_x/or1ksim/bpb/branch_predict.c
541 lot of new parameters concerning memory delays added; bpb parameter moved from cpu to new bpb section; UPDATE YOUR .CFG FILES! markom 8384d 13h /or1k/branches/stable_0_2_x/or1ksim/bpb/branch_predict.c
306 corrected lots of bugs markom 8445d 16h /or1k/branches/stable_0_2_x/or1ksim/bpb/branch_predict.c
264 updated cpu config section; added sim config section markom 8451d 12h /or1k/branches/stable_0_2_x/or1ksim/bpb/branch_predict.c
102 Major update to include PM, PIC, Cache Mngmnt and non-interactive mode. lampret 8619d 21h /or1k/branches/stable_0_2_x/or1ksim/bpb/branch_predict.c
28 Adding COFF loader. lampret 8981d 01h /or1k/branches/stable_0_2_x/or1ksim/bpb/branch_predict.c
26 Clean up. lampret 8996d 22h /or1k/branches/stable_0_2_x/or1ksim/bpb/branch_predict.c
6 Just a regular update with exception of cache simulation. MMU simulation still under development. lampret 9061d 04h /or1k/branches/stable_0_2_x/or1ksim/bpb/branch_predict.c
3 This commit was generated by cvs2svn to compensate for changes in r2, which
included commits to RCS files with non-trunk default branches.		 cvs 9186d 22h /or1k/branches/stable_0_2_x/or1ksim/bpb/branch_predict.c
2 First import. cvs 9186d 22h /or1k/branches/stable_0_2_x/or1ksim/bpb/branch_predict.c

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