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[/] [or1k/] [branches/] [stable_0_2_x/] [or1ksim/] [cache/] [Makefile.in] - Rev 1773

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1765 root 5717d 23h /or1k/branches/stable_0_2_x/or1ksim/cache/Makefile.in
1646 This commit was manufactured by cvs2svn to create branch 'stable_0_2_x'. 6865d 03h /or1k/branches/stable_0_2_x/or1ksim/cache/Makefile.in
1576 configure updates phoenix 6976d 23h /or1k/branches/stable_0_2_x/or1ksim/cache/Makefile.in
1376 aclocal && autoconf && automake phoenix 7192d 10h /or1k/branches/stable_0_2_x/or1ksim/cache/Makefile.in
1249 Downgrading back to automake-1.4 lampret 7577d 23h /or1k/branches/stable_0_2_x/or1ksim/cache/Makefile.in
1099 cvs bug fixed markom 8007d 11h /or1k/branches/stable_0_2_x/or1ksim/cache/Makefile.in
970 Testbench is now running on ORP architecture platform. simons 8117d 01h /or1k/branches/stable_0_2_x/or1ksim/cache/Makefile.in
876 Beta release of ATA simulation rherveille 8160d 23h /or1k/branches/stable_0_2_x/or1ksim/cache/Makefile.in
517 some performance optimizations markom 8340d 08h /or1k/branches/stable_0_2_x/or1ksim/cache/Makefile.in
221 major changes to testbench; debug unit is moved to /debug; memory organization can be customized; UART from simons; overall cleanup markom 8412d 11h /or1k/branches/stable_0_2_x/or1ksim/cache/Makefile.in
84 Update. lampret 8618d 09h /or1k/branches/stable_0_2_x/or1ksim/cache/Makefile.in
18 or16 added, or1k renamed to or32. lampret 8951d 14h /or1k/branches/stable_0_2_x/or1ksim/cache/Makefile.in
13 Rebuild of the generated files. jrydberg 9012d 06h /or1k/branches/stable_0_2_x/or1ksim/cache/Makefile.in
7 Major update of the enviorment. Now uses autoconf and automake. The
simulator uses readline aswell to get input from the user. A number of
new files added, some modified. The libc directory is now called support.		 jrydberg 9012d 07h /or1k/branches/stable_0_2_x/or1ksim/cache/Makefile.in

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