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[/] [or1k/] [branches/] [stable_0_2_x/] [or1ksim/] [cpu/] [common/] [abstract.h] - Rev 1765

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1765 root 5777d 08h /or1k/branches/stable_0_2_x/or1ksim/cpu/common/abstract.h
1646 This commit was manufactured by cvs2svn to create branch 'stable_0_2_x'. 6924d 11h /or1k/branches/stable_0_2_x/or1ksim/cpu/common/abstract.h
1556 Create an 8-bit program load function to be able to load an unaligned section nogj 7059d 22h /or1k/branches/stable_0_2_x/or1ksim/cpu/common/abstract.h
1549 Spelling fixes nogj 7121d 11h /or1k/branches/stable_0_2_x/or1ksim/cpu/common/abstract.h
1539 Speed up the dmmu nogj 7122d 00h /or1k/branches/stable_0_2_x/or1ksim/cpu/common/abstract.h
1538 Speed up the immu nogj 7122d 00h /or1k/branches/stable_0_2_x/or1ksim/cpu/common/abstract.h
1525 Rename ADDR_PAGE to IADDR_PAGE nogj 7126d 19h /or1k/branches/stable_0_2_x/or1ksim/cpu/common/abstract.h
1487 Remove useless *breakpoint argument from the {set,eval}_direct* functions nogj 7164d 23h /or1k/branches/stable_0_2_x/or1ksim/cpu/common/abstract.h
1486 * Seporate out the code used for handling the memory peripheral to peripheral/memory.c
* Mostly decouple the memory controller from the internals of the memory handling.
* Rewrite memory handling to be more linear and thus much faster.
* Issue a bus error on read/write with invalid granularity.		 nogj 7169d 19h /or1k/branches/stable_0_2_x/or1ksim/cpu/common/abstract.h
1483 Remove fixed pagesize limitation from the recompiler nogj 7190d 11h /or1k/branches/stable_0_2_x/or1ksim/cpu/common/abstract.h
1452 Implement a dynamic recompiler to speed up the execution nogj 7217d 15h /or1k/branches/stable_0_2_x/or1ksim/cpu/common/abstract.h
1446 Cosmetic fixes nogj 7217d 15h /or1k/branches/stable_0_2_x/or1ksim/cpu/common/abstract.h
1398 Correct incorrect calls to eval_direct8 nogj 7217d 15h /or1k/branches/stable_0_2_x/or1ksim/cpu/common/abstract.h
1359 Pass private data in readfunc/writefunc callbacks nogj 7258d 10h /or1k/branches/stable_0_2_x/or1ksim/cpu/common/abstract.h
1352 Optimise execution history tracking nogj 7267d 13h /or1k/branches/stable_0_2_x/or1ksim/cpu/common/abstract.h
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7267d 13h /or1k/branches/stable_0_2_x/or1ksim/cpu/common/abstract.h
1346 Remove the global op structure nogj 7280d 16h /or1k/branches/stable_0_2_x/or1ksim/cpu/common/abstract.h
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7280d 17h /or1k/branches/stable_0_2_x/or1ksim/cpu/common/abstract.h
1319 cpu/sim memory accesses separation, tick, exception, nr. of operands, cycles count,... corrections. phoenix 7384d 08h /or1k/branches/stable_0_2_x/or1ksim/cpu/common/abstract.h
1308 Gyorgy Jeney: extensive cleanup phoenix 7472d 08h /or1k/branches/stable_0_2_x/or1ksim/cpu/common/abstract.h

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