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[/] [or1k/] [branches/] [stable_0_2_x/] [or1ksim/] [cpu/] [or32/] [insnset.c] - Rev 1781

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1765 root 5730d 18h /or1k/branches/stable_0_2_x/or1ksim/cpu/or32/insnset.c
1646 This commit was manufactured by cvs2svn to create branch 'stable_0_2_x'. 6877d 21h /or1k/branches/stable_0_2_x/or1ksim/cpu/or32/insnset.c
1557 Fix most warnings issued by gcc4 nogj 7013d 08h /or1k/branches/stable_0_2_x/or1ksim/cpu/or32/insnset.c
1537 Remove old spr logging code. Use `-d +spr' to get spr access logged to stderr nogj 7075d 10h /or1k/branches/stable_0_2_x/or1ksim/cpu/or32/insnset.c
1513 Remove the flag global nogj 7080d 05h /or1k/branches/stable_0_2_x/or1ksim/cpu/or32/insnset.c
1508 Remove m{f,t}spr calls where we can access the spr directly nogj 7080d 05h /or1k/branches/stable_0_2_x/or1ksim/cpu/or32/insnset.c
1506 * Remove very slow {set,test}sprbit{,s} functions.
* Remove uses of getsprbits in time critical functions.
nogj 7080d 05h /or1k/branches/stable_0_2_x/or1ksim/cpu/or32/insnset.c
1471 Rewrite the interactive mode handling to also work in the recompiler nogj 7171d 01h /or1k/branches/stable_0_2_x/or1ksim/cpu/or32/insnset.c
1438 NOP_REPORT should report numbers in hex not decimal nogj 7171d 01h /or1k/branches/stable_0_2_x/or1ksim/cpu/or32/insnset.c
1432 Collect most of the cpu state variables in a structure (cpu_state) nogj 7171d 01h /or1k/branches/stable_0_2_x/or1ksim/cpu/or32/insnset.c
1386 Rework exception handling nogj 7177d 05h /or1k/branches/stable_0_2_x/or1ksim/cpu/or32/insnset.c
1375 Remove FAST_SIM, it nolonger provides a speed up nogj 7211d 20h /or1k/branches/stable_0_2_x/or1ksim/cpu/or32/insnset.c
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7220d 23h /or1k/branches/stable_0_2_x/or1ksim/cpu/or32/insnset.c
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7234d 03h /or1k/branches/stable_0_2_x/or1ksim/cpu/or32/insnset.c
1343 * Fix warnings in insnset.c and execute.c nogj 7234d 03h /or1k/branches/stable_0_2_x/or1ksim/cpu/or32/insnset.c
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.
nogj 7234d 03h /or1k/branches/stable_0_2_x/or1ksim/cpu/or32/insnset.c
1338 l.ff1 instruction added andreje 7250d 01h /or1k/branches/stable_0_2_x/or1ksim/cpu/or32/insnset.c
1321 some tests rely on exit(0) as a last std output text to pass phoenix 7335d 18h /or1k/branches/stable_0_2_x/or1ksim/cpu/or32/insnset.c
1319 cpu/sim memory accesses separation, tick, exception, nr. of operands, cycles count,... corrections. phoenix 7337d 18h /or1k/branches/stable_0_2_x/or1ksim/cpu/or32/insnset.c
1308 Gyorgy Jeney: extensive cleanup phoenix 7425d 18h /or1k/branches/stable_0_2_x/or1ksim/cpu/or32/insnset.c

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