URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [branches/] [stable_0_2_x/] [or1ksim/] [peripheral/] [atahost.h] - Rev 1765

Rev	Log message	Author	Age	Path
1765		root	5732d 00h	/or1k/branches/stable_0_2_x/or1ksim/peripheral/atahost.h
1646	This commit was manufactured by cvs2svn to create branch 'stable_0_2_x'.		6879d 03h	/or1k/branches/stable_0_2_x/or1ksim/peripheral/atahost.h
1486	* Seporate out the code used for handling the memory peripheral to peripheral/memory.c * Mostly decouple the memory controller from the internals of the memory handling. * Rewrite memory handling to be more linear and thus much faster. * Issue a bus error on read/write with invalid granularity.	nogj	7124d 12h	/or1k/branches/stable_0_2_x/or1ksim/peripheral/atahost.h
1461	Add an optional `enabled' paramter to every peripheral	nogj	7172d 07h	/or1k/branches/stable_0_2_x/or1ksim/peripheral/atahost.h
1364	Clean up the ata peripheral useing the new set of callbacks	nogj	7213d 02h	/or1k/branches/stable_0_2_x/or1ksim/peripheral/atahost.h
1359	Pass private data in readfunc/writefunc callbacks	nogj	7213d 02h	/or1k/branches/stable_0_2_x/or1ksim/peripheral/atahost.h
1350	Mark a simulated cpu address as such, by introducing the new oraddr_t type	nogj	7222d 05h	/or1k/branches/stable_0_2_x/or1ksim/peripheral/atahost.h
1308	Gyorgy Jeney: extensive cleanup	phoenix	7427d 00h	/or1k/branches/stable_0_2_x/or1ksim/peripheral/atahost.h
919	stable release	rherveille	8146d 05h	/or1k/branches/stable_0_2_x/or1ksim/peripheral/atahost.h
876	Beta release of ATA simulation	rherveille	8175d 00h	/or1k/branches/stable_0_2_x/or1ksim/peripheral/atahost.h