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[/] [or1k/] [branches/] [stable_0_2_x/] [or1ksim/] [support/] [dumpverilog.c] - Rev 1765

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1765 root 5562d 15h /or1k/branches/stable_0_2_x/or1ksim/support/dumpverilog.c
1646 This commit was manufactured by cvs2svn to create branch 'stable_0_2_x'. 6709d 18h /or1k/branches/stable_0_2_x/or1ksim/support/dumpverilog.c
1604 Fix dumphex/dumpverilog to not do unaligned memory access nogj 6770d 20h /or1k/branches/stable_0_2_x/or1ksim/support/dumpverilog.c
1557 Fix most warnings issued by gcc4 nogj 6845d 05h /or1k/branches/stable_0_2_x/or1ksim/support/dumpverilog.c
1487 Remove useless *breakpoint argument from the {set,eval}_direct* functions nogj 6950d 06h /or1k/branches/stable_0_2_x/or1ksim/support/dumpverilog.c
1484 Use the {set,eval}_direct* functions where they are supposed to be used nogj 6960d 21h /or1k/branches/stable_0_2_x/or1ksim/support/dumpverilog.c
1432 Collect most of the cpu state variables in a structure (cpu_state) nogj 7002d 22h /or1k/branches/stable_0_2_x/or1ksim/support/dumpverilog.c
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7043d 17h /or1k/branches/stable_0_2_x/or1ksim/support/dumpverilog.c
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7052d 20h /or1k/branches/stable_0_2_x/or1ksim/support/dumpverilog.c
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7066d 00h /or1k/branches/stable_0_2_x/or1ksim/support/dumpverilog.c
1308 Gyorgy Jeney: extensive cleanup phoenix 7257d 15h /or1k/branches/stable_0_2_x/or1ksim/support/dumpverilog.c
997 PRINTF should be used instead of printf; command redirection repaired markom 7954d 05h /or1k/branches/stable_0_2_x/or1ksim/support/dumpverilog.c
494 trace.h removed; removed absolete trace_fd code - use exe_log instead markom 8199d 01h /or1k/branches/stable_0_2_x/or1ksim/support/dumpverilog.c
261 modified memory accesses; added cfg script; added pic test basic entry of vga; some extensions to mc markom 8248d 04h /or1k/branches/stable_0_2_x/or1ksim/support/dumpverilog.c
260 Replaced some 8-bit memory access with 32-bit erez 8249d 18h /or1k/branches/stable_0_2_x/or1ksim/support/dumpverilog.c
237 Added some checks about memory entries erez 8256d 17h /or1k/branches/stable_0_2_x/or1ksim/support/dumpverilog.c
221 major changes to testbench; debug unit is moved to /debug; memory organization can be customized; UART from simons; overall cleanup markom 8257d 03h /or1k/branches/stable_0_2_x/or1ksim/support/dumpverilog.c
138 - on the fly insn decoding
- removed asm input file support
- removed string from execution
- speedup of loading		 markom 8381d 05h /or1k/branches/stable_0_2_x/or1ksim/support/dumpverilog.c
123 Bugs fixed:
- l.rfe temporarly disables exceptions
- l.sys does PC -= 4
- breakpoints now supported at peripheria locations
- uart0.rt/.tx nonexistent file segment fault

Other modifications:
- replaced string names to instruction indexes
- execute.c executes specified (in ISA table) function
- modified ISA table - flag needed for gdb
- added or32.c, which supports or32.h
- added new instructions l.mac, l.msb, l.maci, l.macrc
and their executing functions (opcodes to be revisited)
- added header acconfig.h
- modified configuration files		 markom 8391d 00h /or1k/branches/stable_0_2_x/or1ksim/support/dumpverilog.c
85 Added dumphex. lampret 8463d 00h /or1k/branches/stable_0_2_x/or1ksim/support/dumpverilog.c

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