OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [branches/] [stable_0_2_x/] [or1ksim/] [testbench/] [mc_dram.c] - Rev 1765

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5765d 11h /or1k/branches/stable_0_2_x/or1ksim/testbench/mc_dram.c
1646 This commit was manufactured by cvs2svn to create branch 'stable_0_2_x'. 6912d 14h /or1k/branches/stable_0_2_x/or1ksim/testbench/mc_dram.c
1024 Mess with printf/PRINTF fixed. Ethernet test changed to support latest changes. simons 8144d 22h /or1k/branches/stable_0_2_x/or1ksim/testbench/mc_dram.c
997 PRINTF should be used instead of printf; command redirection repaired markom 8157d 01h /or1k/branches/stable_0_2_x/or1ksim/testbench/mc_dram.c
552 Added option to read configuration from MC.
Fixed bugs in address calculation.
ivang 8382d 17h /or1k/branches/stable_0_2_x/or1ksim/testbench/mc_dram.c
544 Added GPIO output for progress indication for FPGA simulation. ivang 8383d 18h /or1k/branches/stable_0_2_x/or1ksim/testbench/mc_dram.c
454 MC Tests. ivang 8408d 19h /or1k/branches/stable_0_2_x/or1ksim/testbench/mc_dram.c

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.