OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_47/] [or1ksim/] [cpu/] [or1k/] [sprs.h] - Rev 1782

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5582d 13h /or1k/tags/nog_patch_47/or1ksim/cpu/or1k/sprs.h
1419 This commit was manufactured by cvs2svn to create tag 'nog_patch_47'. 7022d 20h /or1k/tags/nog_patch_47/or1ksim/cpu/or1k/sprs.h
1354 typing fixes phoenix 7071d 21h /or1k/tags/nog_patch_47/or1ksim/cpu/or1k/sprs.h
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7072d 18h /or1k/tags/nog_patch_47/or1ksim/cpu/or1k/sprs.h
997 PRINTF should be used instead of printf; command redirection repaired markom 7974d 03h /or1k/tags/nog_patch_47/or1ksim/cpu/or1k/sprs.h
728 tick timer works with scheduler markom 8143d 01h /or1k/tags/nog_patch_47/or1ksim/cpu/or1k/sprs.h
644 Modified logging of SPR accesses. Logging only explicit instruction accesses. ivang 8173d 22h /or1k/tags/nog_patch_47/or1ksim/cpu/or1k/sprs.h
624 Added logging of writes/read to/from SPR registers. ivang 8180d 19h /or1k/tags/nog_patch_47/or1ksim/cpu/or1k/sprs.h
600 No more low/high priority interrupts (PICPR removed). Added tick timer exception. simons 8189d 13h /or1k/tags/nog_patch_47/or1ksim/cpu/or1k/sprs.h
518 some more performance optimizations markom 8204d 21h /or1k/tags/nog_patch_47/or1ksim/cpu/or1k/sprs.h
517 some performance optimizations markom 8204d 22h /or1k/tags/nog_patch_47/or1ksim/cpu/or1k/sprs.h
479 connection with gdb repaired; temp_except_delay removed; lot of except and debug code cleaned; sys 203 causes stall under gdb; non-sim memory area log bug fixed markom 8220d 21h /or1k/tags/nog_patch_47/or1ksim/cpu/or1k/sprs.h
167 - SPR values corrected
- testbenches now work
- lot of optimizations, use --disable-debugmod for optimal performance
- some tick timer bugs fixed
markom 8353d 22h /or1k/tags/nog_patch_47/or1ksim/cpu/or1k/sprs.h
123 Bugs fixed:
- l.rfe temporarly disables exceptions
- l.sys does PC -= 4
- breakpoints now supported at peripheria locations
- uart0.rt/.tx nonexistent file segment fault

Other modifications:
- replaced string names to instruction indexes
- execute.c executes specified (in ISA table) function
- modified ISA table - flag needed for gdb
- added or32.c, which supports or32.h
- added new instructions l.mac, l.msb, l.maci, l.macrc
and their executing functions (opcodes to be revisited)
- added header acconfig.h
- modified configuration files
markom 8410d 22h /or1k/tags/nog_patch_47/or1ksim/cpu/or1k/sprs.h
64 SPR bit definition moved to spr_defs.h. lampret 8655d 04h /or1k/tags/nog_patch_47/or1ksim/cpu/or1k/sprs.h
48 Added CCR. lampret 8767d 00h /or1k/tags/nog_patch_47/or1ksim/cpu/or1k/sprs.h
30 Updated SPRs, exceptions. Added 16450 device. lampret 8782d 13h /or1k/tags/nog_patch_47/or1ksim/cpu/or1k/sprs.h
23 Common OR1K backend for OR32 and OR16. lampret 8813d 08h /or1k/tags/nog_patch_47/or1ksim/cpu/or1k/sprs.h

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.