URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_51/] [or1ksim/] [mmu/] [dmmu.h] - Rev 1768

Rev	Log message	Author	Age	Path
1765		root	5700d 22h	/or1k/tags/nog_patch_51/or1ksim/mmu/dmmu.h
1427	This commit was manufactured by cvs2svn to create tag 'nog_patch_51'.		7141d 05h	/or1k/tags/nog_patch_51/or1ksim/mmu/dmmu.h
1350	Mark a simulated cpu address as such, by introducing the new oraddr_t type	nogj	7191d 04h	/or1k/tags/nog_patch_51/or1ksim/mmu/dmmu.h
1308	Gyorgy Jeney: extensive cleanup	phoenix	7395d 22h	/or1k/tags/nog_patch_51/or1ksim/mmu/dmmu.h
430	dpfault and ipfault exceptions implemented	markom	8347d 06h	/or1k/tags/nog_patch_51/or1ksim/mmu/dmmu.h
425	immu and dmmu configurations added	markom	8347d 08h	/or1k/tags/nog_patch_51/or1ksim/mmu/dmmu.h
204	Added function prototypes to stop gcc from complaining	erez	8429d 08h	/or1k/tags/nog_patch_51/or1ksim/mmu/dmmu.h
62	OR1K DMMU model.	lampret	8773d 14h	/or1k/tags/nog_patch_51/or1ksim/mmu/dmmu.h
6	Just a regular update with exception of cache simulation. MMU simulation still under development.	lampret	8996d 00h	/or1k/tags/nog_patch_51/or1ksim/mmu/dmmu.h