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[/] [or1k/] [tags/] [nog_patch_60/] [or1ksim/] [cpu/] [common/] [abstract.c] - Rev 1765

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1765 root 5650d 02h /or1k/tags/nog_patch_60/or1ksim/cpu/common/abstract.c
1445 This commit was manufactured by cvs2svn to create tag 'nog_patch_60'. 7090d 09h /or1k/tags/nog_patch_60/or1ksim/cpu/common/abstract.c
1432 Collect most of the cpu state variables in a structure (cpu_state) nogj 7090d 09h /or1k/tags/nog_patch_60/or1ksim/cpu/common/abstract.c
1386 Rework exception handling nogj 7096d 12h /or1k/tags/nog_patch_60/or1ksim/cpu/common/abstract.c
1375 Remove FAST_SIM, it nolonger provides a speed up nogj 7131d 04h /or1k/tags/nog_patch_60/or1ksim/cpu/common/abstract.c
1362 initialise dev_mem->chip_select in register_memory nogj 7131d 04h /or1k/tags/nog_patch_60/or1ksim/cpu/common/abstract.c
1359 Pass private data in readfunc/writefunc callbacks nogj 7131d 04h /or1k/tags/nog_patch_60/or1ksim/cpu/common/abstract.c
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7131d 04h /or1k/tags/nog_patch_60/or1ksim/cpu/common/abstract.c
1354 typing fixes phoenix 7139d 10h /or1k/tags/nog_patch_60/or1ksim/cpu/common/abstract.c
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7140d 07h /or1k/tags/nog_patch_60/or1ksim/cpu/common/abstract.c
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7153d 11h /or1k/tags/nog_patch_60/or1ksim/cpu/common/abstract.c
1324 memory access functions fixes phoenix 7251d 02h /or1k/tags/nog_patch_60/or1ksim/cpu/common/abstract.c
1319 cpu/sim memory accesses separation, tick, exception, nr. of operands, cycles count,... corrections. phoenix 7257d 02h /or1k/tags/nog_patch_60/or1ksim/cpu/common/abstract.c
1308 Gyorgy Jeney: extensive cleanup phoenix 7345d 02h /or1k/tags/nog_patch_60/or1ksim/cpu/common/abstract.c
1244 Added "cm" command to copy data inside memory.
Make or1ksim work on little endian platforms.
Port to Mac OS X.
Some bugfixes.
Allow JTAG write access to read-only memory regions.		 hpanther 7512d 10h /or1k/tags/nog_patch_60/or1ksim/cpu/common/abstract.c
1240 additional functions to bypass cache and mmu needed for peripheral devices phoenix 7516d 21h /or1k/tags/nog_patch_60/or1ksim/cpu/common/abstract.c
1218 segfault when there is no memory context fix phoenix 7564d 23h /or1k/tags/nog_patch_60/or1ksim/cpu/common/abstract.c
997 PRINTF should be used instead of printf; command redirection repaired markom 8041d 16h /or1k/tags/nog_patch_60/or1ksim/cpu/common/abstract.c
992 A bug when cache enabled and bus error comes fixed. simons 8043d 08h /or1k/tags/nog_patch_60/or1ksim/cpu/common/abstract.c
970 Testbench is now running on ORP architecture platform. simons 8049d 03h /or1k/tags/nog_patch_60/or1ksim/cpu/common/abstract.c

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