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[/] [or1k/] [tags/] [rel-0-3-0-rc1/] [or1ksim/] [cpu/] [or1k/] [except.h] - Rev 1765

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1765 root 5625d 12h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/except.h
1749 This commit was manufactured by cvs2svn to create tag 'rel-0-3-0-rc1'. 5774d 17h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/except.h
1748 These are all the changes for Or1ksim 0.3.0 release candidate 1. The changes
are explained in the NEWS, README and ChangeLog files. A number of
long-standing bugs are fixed (see the OpenRISC tracker), and the code is
brought up to a consistent standard, following the GNU coding conventions
throughout.

Argument parsing now uses argtable2, and a User Guide has been added.
Documentation throughout has been extended to be compatible with Doxygen,
providing a further level of technical detail on the internals.		 jeremybennett 5774d 17h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/except.h
1452 Implement a dynamic recompiler to speed up the execution nogj 7065d 19h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/except.h
1386 Rework exception handling nogj 7071d 22h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/except.h
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7115d 17h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/except.h
599 No more low/high priority interrupts (PICPR removed). Added tick timer exception. simons 8232d 12h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/except.h
479 connection with gdb repaired; temp_except_delay removed; lot of except and debug code cleaned; sys 203 causes stall under gdb; non-sim memory area log bug fixed markom 8263d 20h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/except.h
437 When lsu instruction produce exception registers are preserved. simons 8270d 21h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/except.h
261 modified memory accesses; added cfg script; added pic test basic entry of vga; some extensions to mc markom 8311d 01h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/except.h
137 Added TRAP exception chris 8445d 01h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/except.h
102 Major update to include PM, PIC, Cache Mngmnt and non-interactive mode. lampret 8479d 06h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/except.h
99 *** empty log message *** lampret 8494d 06h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/except.h
77 Regular update. lampret 8679d 03h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/except.h
64 SPR bit definition moved to spr_defs.h. lampret 8698d 03h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/except.h
54 Regular maintenance. lampret 8749d 03h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/except.h
49 Changed simulation mode to non-virtual (real). lampret 8809d 23h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/except.h
38 Virtual machine at the moment. lampret 8821d 10h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/except.h
33 Handling of or1k exceptions. lampret 8825d 09h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/except.h

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