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[/] [or1k/] [tags/] [rel-0-3-0-rc1/] [or1ksim/] [cpu/] [or1k/] [opcode/] [or32.h] - Rev 1765

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1765 root 5625d 13h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/opcode/or32.h
1749 This commit was manufactured by cvs2svn to create tag 'rel-0-3-0-rc1'. 5774d 18h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/opcode/or32.h
1748 These are all the changes for Or1ksim 0.3.0 release candidate 1. The changes
are explained in the NEWS, README and ChangeLog files. A number of
long-standing bugs are fixed (see the OpenRISC tracker), and the code is
brought up to a consistent standard, following the GNU coding conventions
throughout.

Argument parsing now uses argtable2, and a User Guide has been added.
Documentation throughout has been extended to be compatible with Doxygen,
providing a further level of technical detail on the internals.		 jeremybennett 5774d 18h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/opcode/or32.h
1656 Pass the instruction operands as part of the op_queue structure. nogj 6771d 17h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/opcode/or32.h
1452 Implement a dynamic recompiler to speed up the execution nogj 7065d 20h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/opcode/or32.h
1444 Move the definitions needed for the simple execution model out of or32.h and into simpl32_defs.h nogj 7065d 20h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/opcode/or32.h
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7128d 22h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/opcode/or32.h
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.		 nogj 7128d 22h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/opcode/or32.h
1341 Mark wich operand is the destination operand in the architechture definition nogj 7128d 23h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/opcode/or32.h
1338 l.ff1 instruction added andreje 7144d 20h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/opcode/or32.h
1256 page size is 8192 on or32 phoenix 7476d 16h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/opcode/or32.h
1169 Added support for l.addc instruction. csanchez 7704d 16h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/opcode/or32.h
879 Initial version of OpenRISC Custom Unit Compiler added markom 8066d 19h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/opcode/or32.h
720 single floating point support added markom 8187d 02h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/opcode/or32.h
706 insn_decode execution part replaced by generated function decode_execute; use --enable-simple to use runtime decoding markom 8192d 22h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/opcode/or32.h
703 small optimizations to dissasemble markom 8194d 02h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/opcode/or32.h
680 num_opcodes better because of linking. ivang 8203d 19h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/opcode/or32.h
679 extern CONST int num_opcodes -> extern CONST unsigned int or32_num_opcodes. ivang 8203d 21h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/opcode/or32.h
676 update of shared files markom 8205d 23h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/opcode/or32.h
662 GNU binutils merge. ivang 8210d 01h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/opcode/or32.h

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