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[/] [or1k/] [tags/] [rel-0-3-0-rc1/] [or1ksim/] [cpu/] [or32/] [insnset.c] - Rev 1778

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1765 root 5628d 11h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or32/insnset.c
1749 This commit was manufactured by cvs2svn to create tag 'rel-0-3-0-rc1'. 5777d 17h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or32/insnset.c
1748 These are all the changes for Or1ksim 0.3.0 release candidate 1. The changes
are explained in the NEWS, README and ChangeLog files. A number of
long-standing bugs are fixed (see the OpenRISC tracker), and the code is
brought up to a consistent standard, following the GNU coding conventions
throughout.

Argument parsing now uses argtable2, and a User Guide has been added.
Documentation throughout has been extended to be compatible with Doxygen,
providing a further level of technical detail on the internals.
jeremybennett 5777d 17h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or32/insnset.c
1744 Changes to bring behavior into line with the current OpenRISC 1000 specification and support GDB 6.8. A couple of small bugs with handling xterms and opening the remote debug channel are also fixed. Header files have been added to sources in Makefile.am files where they are missing, so that "make tags" will include them. Makefile.in files have been regenerated due to these changes. jeremybennett 5814d 16h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or32/insnset.c
1651 Remove usesless (that give zero information) calls to debug(). nogj 6774d 15h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or32/insnset.c
1557 Fix most warnings issued by gcc4 nogj 6911d 01h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or32/insnset.c
1537 Remove old spr logging code. Use `-d +spr' to get spr access logged to stderr nogj 6973d 04h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or32/insnset.c
1513 Remove the flag global nogj 6977d 23h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or32/insnset.c
1508 Remove m{f,t}spr calls where we can access the spr directly nogj 6977d 23h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or32/insnset.c
1506 * Remove very slow {set,test}sprbit{,s} functions.
* Remove uses of getsprbits in time critical functions.
nogj 6977d 23h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or32/insnset.c
1471 Rewrite the interactive mode handling to also work in the recompiler nogj 7068d 18h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or32/insnset.c
1438 NOP_REPORT should report numbers in hex not decimal nogj 7068d 18h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or32/insnset.c
1432 Collect most of the cpu state variables in a structure (cpu_state) nogj 7068d 18h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or32/insnset.c
1386 Rework exception handling nogj 7074d 22h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or32/insnset.c
1375 Remove FAST_SIM, it nolonger provides a speed up nogj 7109d 13h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or32/insnset.c
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7118d 16h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or32/insnset.c
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7131d 20h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or32/insnset.c
1343 * Fix warnings in insnset.c and execute.c nogj 7131d 20h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or32/insnset.c
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.
nogj 7131d 21h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or32/insnset.c
1338 l.ff1 instruction added andreje 7147d 18h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or32/insnset.c

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