OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel-0-3-0-rc1/] [or1ksim/] [sim-config.h] - Rev 1778

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5679d 18h /or1k/tags/rel-0-3-0-rc1/or1ksim/sim-config.h
1749 This commit was manufactured by cvs2svn to create tag 'rel-0-3-0-rc1'. 5828d 23h /or1k/tags/rel-0-3-0-rc1/or1ksim/sim-config.h
1748 These are all the changes for Or1ksim 0.3.0 release candidate 1. The changes
are explained in the NEWS, README and ChangeLog files. A number of
long-standing bugs are fixed (see the OpenRISC tracker), and the code is
brought up to a consistent standard, following the GNU coding conventions
throughout.

Argument parsing now uses argtable2, and a User Guide has been added.
Documentation throughout has been extended to be compatible with Doxygen,
providing a further level of technical detail on the internals.		 jeremybennett 5828d 23h /or1k/tags/rel-0-3-0-rc1/or1ksim/sim-config.h
1745 These are the changes to allow or1ksim to build as a library as well as a standalone simulator. The concept of a "generic" peripheral is added, which will commuicate with an external model via upcalls. jeremybennett 5864d 22h /or1k/tags/rel-0-3-0-rc1/or1ksim/sim-config.h
1743 Changes to bring behavior into line with the current OpenRISC 1000 specification and support GDB 6.8. A couple of small bugs with handling xterms and opening the remote debug channel are also fixed. Header files have been added to sources in Makefile.am files where they are missing, so that "make tags" will include them. Makefile.in files have been regenerated due to these changes. jeremybennett 5865d 22h /or1k/tags/rel-0-3-0-rc1/or1ksim/sim-config.h
1730 Avoid array lookups as far as possible. Precalculate as much as possible.
Increases performance when running with ic.		 nogj 6824d 08h /or1k/tags/rel-0-3-0-rc1/or1ksim/sim-config.h
1718 Move the dmmu config out of the global config struct nogj 6825d 19h /or1k/tags/rel-0-3-0-rc1/or1ksim/sim-config.h
1717 Move the immu config out of the global config struct nogj 6825d 19h /or1k/tags/rel-0-3-0-rc1/or1ksim/sim-config.h
1715 Add the capability to the pic to simulate a level or edge triggered pic. Add
a clear_interrupt() function that the peripherals need to use to signal that
they negated their interrupt line.		 nogj 6825d 20h /or1k/tags/rel-0-3-0-rc1/or1ksim/sim-config.h
1593 Don't kill sim on second ctrl+c if the cli prompt has already been shown nogj 6900d 00h /or1k/tags/rel-0-3-0-rc1/or1ksim/sim-config.h
1580 Stephan Bourduas
* Fix starting instruction logger from > 2^31 - 1 instructions
* Fix `run x' command, where x > 2^31.

nog.		 nogj 6926d 10h /or1k/tags/rel-0-3-0-rc1/or1ksim/sim-config.h
1557 Fix most warnings issued by gcc4 nogj 6962d 08h /or1k/tags/rel-0-3-0-rc1/or1ksim/sim-config.h
1550 * prototype() -> prototype(void) where appropriate.
* Use `static' where it can be used.		 nogj 7023d 21h /or1k/tags/rel-0-3-0-rc1/or1ksim/sim-config.h
1539 Speed up the dmmu nogj 7024d 10h /or1k/tags/rel-0-3-0-rc1/or1ksim/sim-config.h
1538 Speed up the immu nogj 7024d 10h /or1k/tags/rel-0-3-0-rc1/or1ksim/sim-config.h
1537 Remove old spr logging code. Use `-d +spr' to get spr access logged to stderr nogj 7024d 10h /or1k/tags/rel-0-3-0-rc1/or1ksim/sim-config.h
1486 * Seporate out the code used for handling the memory peripheral to peripheral/memory.c
* Mostly decouple the memory controller from the internals of the memory handling.
* Rewrite memory handling to be more linear and thus much faster.
* Issue a bus error on read/write with invalid granularity.		 nogj 7072d 05h /or1k/tags/rel-0-3-0-rc1/or1ksim/sim-config.h
1485 Remove nolonger used test peripheral nogj 7072d 05h /or1k/tags/rel-0-3-0-rc1/or1ksim/sim-config.h
1471 Rewrite the interactive mode handling to also work in the recompiler nogj 7120d 00h /or1k/tags/rel-0-3-0-rc1/or1ksim/sim-config.h
1455 Remove nolonger needed --output-cfg option nogj 7120d 00h /or1k/tags/rel-0-3-0-rc1/or1ksim/sim-config.h

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.