OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel-0-3-0-rc2/] [or1ksim/] [cpu/] [common/] [abstract.h] - Rev 1765

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5629d 19h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/abstract.h
1753 This commit was manufactured by cvs2svn to create tag 'rel-0-3-0-rc2'. 5749d 02h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/abstract.h
1748 These are all the changes for Or1ksim 0.3.0 release candidate 1. The changes
are explained in the NEWS, README and ChangeLog files. A number of
long-standing bugs are fixed (see the OpenRISC tracker), and the code is
brought up to a consistent standard, following the GNU coding conventions
throughout.

Argument parsing now uses argtable2, and a User Guide has been added.
Documentation throughout has been extended to be compatible with Doxygen,
providing a further level of technical detail on the internals.		 jeremybennett 5779d 00h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/abstract.h
1743 Changes to bring behavior into line with the current OpenRISC 1000 specification and support GDB 6.8. A couple of small bugs with handling xterms and opening the remote debug channel are also fixed. Header files have been added to sources in Makefile.am files where they are missing, so that "make tags" will include them. Makefile.in files have been regenerated due to these changes. jeremybennett 5815d 23h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/abstract.h
1718 Move the dmmu config out of the global config struct nogj 6775d 20h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/abstract.h
1717 Move the immu config out of the global config struct nogj 6775d 20h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/abstract.h
1714 Add a le16_() macro that will return the data in an appropriate endianness for
the cpu to think the data is little endian. Use the macro in the ata
peripheral.		 nogj 6775d 21h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/abstract.h
1556 Create an 8-bit program load function to be able to load an unaligned section nogj 6912d 09h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/abstract.h
1549 Spelling fixes nogj 6973d 22h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/abstract.h
1539 Speed up the dmmu nogj 6974d 11h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/abstract.h
1538 Speed up the immu nogj 6974d 11h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/abstract.h
1525 Rename ADDR_PAGE to IADDR_PAGE nogj 6979d 06h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/abstract.h
1487 Remove useless *breakpoint argument from the {set,eval}_direct* functions nogj 7017d 10h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/abstract.h
1486 * Seporate out the code used for handling the memory peripheral to peripheral/memory.c
* Mostly decouple the memory controller from the internals of the memory handling.
* Rewrite memory handling to be more linear and thus much faster.
* Issue a bus error on read/write with invalid granularity.		 nogj 7022d 06h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/abstract.h
1483 Remove fixed pagesize limitation from the recompiler nogj 7042d 22h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/abstract.h
1452 Implement a dynamic recompiler to speed up the execution nogj 7070d 01h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/abstract.h
1446 Cosmetic fixes nogj 7070d 01h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/abstract.h
1398 Correct incorrect calls to eval_direct8 nogj 7070d 02h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/abstract.h
1359 Pass private data in readfunc/writefunc callbacks nogj 7110d 21h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/abstract.h
1352 Optimise execution history tracking nogj 7119d 23h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/common/abstract.h

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.