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[/] [or1k/] [tags/] [rel-0-3-0-rc2/] [or1ksim/] [peripheral/] [memory.c] - Rev 1765

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1765 root 5578d 13h /or1k/tags/rel-0-3-0-rc2/or1ksim/peripheral/memory.c
1753 This commit was manufactured by cvs2svn to create tag 'rel-0-3-0-rc2'. 5697d 20h /or1k/tags/rel-0-3-0-rc2/or1ksim/peripheral/memory.c
1751 These are the changes to support Or1ksim 0.3.0rc2. Most significantly they provide GDB RSP support. They also fix 5 outstanding bugs and satisfy one new feature request. jeremybennett 5697d 22h /or1k/tags/rel-0-3-0-rc2/or1ksim/peripheral/memory.c
1748 These are all the changes for Or1ksim 0.3.0 release candidate 1. The changes
are explained in the NEWS, README and ChangeLog files. A number of
long-standing bugs are fixed (see the OpenRISC tracker), and the code is
brought up to a consistent standard, following the GNU coding conventions
throughout.

Argument parsing now uses argtable2, and a User Guide has been added.
Documentation throughout has been extended to be compatible with Doxygen,
providing a further level of technical detail on the internals.		 jeremybennett 5727d 18h /or1k/tags/rel-0-3-0-rc2/or1ksim/peripheral/memory.c
1649 Mark as many functions as possible static nogj 6724d 16h /or1k/tags/rel-0-3-0-rc2/or1ksim/peripheral/memory.c
1586 Charles Qi
Fix memory handling on big endian machines		 nogj 6809d 21h /or1k/tags/rel-0-3-0-rc2/or1ksim/peripheral/memory.c
1557 Fix most warnings issued by gcc4 nogj 6861d 03h /or1k/tags/rel-0-3-0-rc2/or1ksim/peripheral/memory.c
1556 Create an 8-bit program load function to be able to load an unaligned section nogj 6861d 03h /or1k/tags/rel-0-3-0-rc2/or1ksim/peripheral/memory.c
1486 * Seporate out the code used for handling the memory peripheral to peripheral/memory.c
* Mostly decouple the memory controller from the internals of the memory handling.
* Rewrite memory handling to be more linear and thus much faster.
* Issue a bus error on read/write with invalid granularity.		 nogj 6971d 00h /or1k/tags/rel-0-3-0-rc2/or1ksim/peripheral/memory.c

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