URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_1/] [or1200/] [rtl/] [verilog/] [or1200_mem2reg.v] - Rev 1765

Rev	Log message	Author	Age	Path
1765		root	5590d 03h	/or1k/tags/rel_1/or1200/rtl/verilog/or1200_mem2reg.v
896	This commit was manufactured by cvs2svn to create tag 'rel_1'.		8021d 03h	/or1k/tags/rel_1/or1200/rtl/verilog/or1200_mem2reg.v
788	Some of the warnings fixed.	lampret	8128d 10h	/or1k/tags/rel_1/or1200/rtl/verilog/or1200_mem2reg.v
777	Changed define name from OR1200_MEM2REG_FAST to OR1200_IMPL_MEM2REG2	lampret	8129d 06h	/or1k/tags/rel_1/or1200/rtl/verilog/or1200_mem2reg.v
562	Fixed mem2reg bug in FAST implementation. Updated debug unit to work with new genpc/if.	lampret	8202d 19h	/or1k/tags/rel_1/or1200/rtl/verilog/or1200_mem2reg.v
504	New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs.	lampret	8213d 17h	/or1k/tags/rel_1/or1200/rtl/verilog/or1200_mem2reg.v