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[/] [or1k/] [tags/] [rel_11/] [or1200/] [rtl/] [verilog/] [or1200_spram_256x21.v] - Rev 1765

Rev	Log message	Author	Age	Path
1765		root	5637d 06h	/or1k/tags/rel_11/or1200/rtl/verilog/or1200_spram_256x21.v
1185	This commit was manufactured by cvs2svn to create tag 'rel_11'.		7667d 12h	/or1k/tags/rel_11/or1200/rtl/verilog/or1200_spram_256x21.v
1184	Scan signals mess fixed.	simons	7667d 12h	/or1k/tags/rel_11/or1200/rtl/verilog/or1200_spram_256x21.v
1179	BIST interface added for Artisan memory instances.	simons	7675d 16h	/or1k/tags/rel_11/or1200/rtl/verilog/or1200_spram_256x21.v
1129	Added Altera LPM RAMs. Changed generic RAM output when OE inactive.	lampret	7802d 04h	/or1k/tags/rel_11/or1200/rtl/verilog/or1200_spram_256x21.v
1063	Added BIST scan. Special VS RAMs need to be used to implement BIST.	lampret	7973d 09h	/or1k/tags/rel_11/or1200/rtl/verilog/or1200_spram_256x21.v
504	New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs.	lampret	8260d 21h	/or1k/tags/rel_11/or1200/rtl/verilog/or1200_spram_256x21.v