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[/] [or1k/] [tags/] [rel_14/] [or1200/] [rtl/] [verilog/] [or1200_ic_tag.v] - Rev 1778

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1765 root 5601d 13h /or1k/tags/rel_14/or1200/rtl/verilog/or1200_ic_tag.v
1190 This commit was manufactured by cvs2svn to create tag 'rel_14'. 7624d 03h /or1k/tags/rel_14/or1200/rtl/verilog/or1200_ic_tag.v
1069 Signal scanb_eni renamed to scanb_en mohor 7930d 14h /or1k/tags/rel_14/or1200/rtl/verilog/or1200_ic_tag.v
1063 Added BIST scan. Special VS RAMs need to be used to implement BIST. lampret 7937d 16h /or1k/tags/rel_14/or1200/rtl/verilog/or1200_ic_tag.v
504 New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs. lampret 8225d 04h /or1k/tags/rel_14/or1200/rtl/verilog/or1200_ic_tag.v

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