URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_15/] [or1200/] [rtl/] [verilog/] [or1200_dc_tag.v] - Rev 1765

Rev	Log message	Author	Age	Path
1765		root	5589d 23h	/or1k/tags/rel_15/or1200/rtl/verilog/or1200_dc_tag.v
1201	This commit was manufactured by cvs2svn to create tag 'rel_15'.		7561d 13h	/or1k/tags/rel_15/or1200/rtl/verilog/or1200_dc_tag.v
1200	mbist signals updated according to newest convention	markom	7561d 13h	/or1k/tags/rel_15/or1200/rtl/verilog/or1200_dc_tag.v
1063	Added BIST scan. Special VS RAMs need to be used to implement BIST.	lampret	7926d 01h	/or1k/tags/rel_15/or1200/rtl/verilog/or1200_dc_tag.v
504	New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs.	lampret	8213d 13h	/or1k/tags/rel_15/or1200/rtl/verilog/or1200_dc_tag.v