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[/] [or1k/] [tags/] [rel_16/] [or1200/] [rtl/] [verilog/] [or1200_spram_1024x32.v] - Rev 1783

Rev	Log message	Author	Age	Path
1765		root	5620d 06h	/or1k/tags/rel_16/or1200/rtl/verilog/or1200_spram_1024x32.v
1212	This commit was manufactured by cvs2svn to create tag 'rel_16'.		7543d 04h	/or1k/tags/rel_16/or1200/rtl/verilog/or1200_spram_1024x32.v
1171	Added embedded memory QMEM.	lampret	7692d 13h	/or1k/tags/rel_16/or1200/rtl/verilog/or1200_spram_1024x32.v
1163	This commit was manufactured by cvs2svn to create branch 'branch_qmem'.		7725d 01h	/or1k/tags/rel_16/or1200/rtl/verilog/or1200_spram_1024x32.v
1129	Added Altera LPM RAMs. Changed generic RAM output when OE inactive.	lampret	7785d 03h	/or1k/tags/rel_16/or1200/rtl/verilog/or1200_spram_1024x32.v
1063	Added BIST scan. Special VS RAMs need to be used to implement BIST.	lampret	7956d 08h	/or1k/tags/rel_16/or1200/rtl/verilog/or1200_spram_1024x32.v
504	New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs.	lampret	8243d 20h	/or1k/tags/rel_16/or1200/rtl/verilog/or1200_spram_1024x32.v