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[/] [or1k/] [tags/] [rel_20/] [or1200/] [rtl/] [verilog/] [or1200_xcv_ram32x8d.v] - Rev 1765

Rev	Log message	Author	Age	Path
1765		root	5586d 14h	/or1k/tags/rel_20/or1200/rtl/verilog/or1200_xcv_ram32x8d.v
1227	This commit was manufactured by cvs2svn to create tag 'rel_20'.		7468d 06h	/or1k/tags/rel_20/or1200/rtl/verilog/or1200_xcv_ram32x8d.v
1163	This commit was manufactured by cvs2svn to create branch 'branch_qmem'.		7691d 10h	/or1k/tags/rel_20/or1200/rtl/verilog/or1200_xcv_ram32x8d.v
895	Added simple trace buffer [only for Xilinx Virtex target]. Fixed instruction fetch abort when new exception is recognized.	lampret	8017d 14h	/or1k/tags/rel_20/or1200/rtl/verilog/or1200_xcv_ram32x8d.v
504	New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs.	lampret	8210d 04h	/or1k/tags/rel_20/or1200/rtl/verilog/or1200_xcv_ram32x8d.v