OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_1_0/] [or1ksim/] [pic/] [Makefile.in] - Rev 1780

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5586d 04h /or1k/tags/stable_0_1_0/or1ksim/pic/Makefile.in
1357 This commit was manufactured by cvs2svn to create tag 'stable_0_1_0'. 7074d 17h /or1k/tags/stable_0_1_0/or1ksim/pic/Makefile.in
1356 This commit was manufactured by cvs2svn to create branch 'stable_0_1_x'. 7074d 17h /or1k/tags/stable_0_1_0/or1ksim/pic/Makefile.in
1249 Downgrading back to automake-1.4 lampret 7446d 04h /or1k/tags/stable_0_1_0/or1ksim/pic/Makefile.in
970 Testbench is now running on ORP architecture platform. simons 7985d 05h /or1k/tags/stable_0_1_0/or1ksim/pic/Makefile.in
876 Beta release of ATA simulation rherveille 8029d 04h /or1k/tags/stable_0_1_0/or1ksim/pic/Makefile.in
517 some performance optimizations markom 8208d 13h /or1k/tags/stable_0_1_0/or1ksim/pic/Makefile.in
221 major changes to testbench; debug unit is moved to /debug; memory organization can be customized; UART from simons; overall cleanup markom 8280d 16h /or1k/tags/stable_0_1_0/or1ksim/pic/Makefile.in
102 Major update to include PM, PIC, Cache Mngmnt and non-interactive mode. lampret 8439d 22h /or1k/tags/stable_0_1_0/or1ksim/pic/Makefile.in

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.