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[/] [or1k/] [tags/] [stable_0_2_0/] [or1ksim/] [testbench/] [mmu.c] - Rev 1765

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1765 root 5628d 12h /or1k/tags/stable_0_2_0/or1ksim/testbench/mmu.c
1647 This commit was manufactured by cvs2svn to create tag 'stable_0_2_0'. 6775d 15h /or1k/tags/stable_0_2_0/or1ksim/testbench/mmu.c
1646 This commit was manufactured by cvs2svn to create branch 'stable_0_2_x'. 6775d 15h /or1k/tags/stable_0_2_0/or1ksim/testbench/mmu.c
1614 CI should not be set in dMMU translation tables or one gets different behaviour with dMMU on or off in case data cache is enabled. care should be taken for addresses higher than 0x7fff_ffff where the situation is just reversed. (since or1200 does not cache upper half of address space if there is no dMMU) phoenix 6820d 11h /or1k/tags/stable_0_2_0/or1ksim/testbench/mmu.c
1446 Cosmetic fixes nogj 7068d 19h /or1k/tags/stable_0_2_0/or1ksim/testbench/mmu.c
1024 Mess with printf/PRINTF fixed. Ethernet test changed to support latest changes. simons 8008d 00h /or1k/tags/stable_0_2_0/or1ksim/testbench/mmu.c
997 PRINTF should be used instead of printf; command redirection repaired markom 8020d 02h /or1k/tags/stable_0_2_0/or1ksim/testbench/mmu.c
970 Testbench is now running on ORP architecture platform. simons 8027d 13h /or1k/tags/stable_0_2_0/or1ksim/testbench/mmu.c
957 Flash at 0x04000000 RAM at 0x00000000. Only MMU test works. simons 8029d 15h /or1k/tags/stable_0_2_0/or1ksim/testbench/mmu.c
639 MMU cache inhibit bit test added. simons 8222d 14h /or1k/tags/stable_0_2_0/or1ksim/testbench/mmu.c
600 No more low/high priority interrupts (PICPR removed). Added tick timer exception. simons 8235d 12h /or1k/tags/stable_0_2_0/or1ksim/testbench/mmu.c
509 unused var warning corrected markom 8251d 21h /or1k/tags/stable_0_2_0/or1ksim/testbench/mmu.c
480 RTL_SIM define added for shorter simulation runtime. simons 8266d 20h /or1k/tags/stable_0_2_0/or1ksim/testbench/mmu.c
466 EEAR is used for determing ITLB miss and IPF page address. simons 8267d 13h /or1k/tags/stable_0_2_0/or1ksim/testbench/mmu.c
457 Page size set to 8192. simons 8271d 16h /or1k/tags/stable_0_2_0/or1ksim/testbench/mmu.c
448 Permission test added. simons 8273d 02h /or1k/tags/stable_0_2_0/or1ksim/testbench/mmu.c
417 ITLB test tested on simulator. simons 8277d 11h /or1k/tags/stable_0_2_0/or1ksim/testbench/mmu.c
415 DTLB test tested on simulator. simons 8278d 12h /or1k/tags/stable_0_2_0/or1ksim/testbench/mmu.c
413 some section changes markom 8278d 21h /or1k/tags/stable_0_2_0/or1ksim/testbench/mmu.c
412 *** empty log message *** simons 8278d 22h /or1k/tags/stable_0_2_0/or1ksim/testbench/mmu.c

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