URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [or1ksim/] [testbench/] [mmu_asm.S] - Rev 1765

Rev	Log message	Author	Age	Path
1765		root	5584d 10h	/or1k/tags/stable_0_2_0_rc1/or1ksim/testbench/mmu_asm.S
1572	This commit was manufactured by cvs2svn to create tag 'stable_0_2_0_rc1'.		6858d 17h	/or1k/tags/stable_0_2_0_rc1/or1ksim/testbench/mmu_asm.S
639	MMU cache inhibit bit test added.	simons	8178d 12h	/or1k/tags/stable_0_2_0_rc1/or1ksim/testbench/mmu_asm.S
600	No more low/high priority interrupts (PICPR removed). Added tick timer exception.	simons	8191d 10h	/or1k/tags/stable_0_2_0_rc1/or1ksim/testbench/mmu_asm.S
475	l.jalr r9 is not used any more.	simons	8222d 21h	/or1k/tags/stable_0_2_0_rc1/or1ksim/testbench/mmu_asm.S
415	DTLB test tested on simulator.	simons	8234d 10h	/or1k/tags/stable_0_2_0_rc1/or1ksim/testbench/mmu_asm.S
413	some section changes	markom	8234d 20h	/or1k/tags/stable_0_2_0_rc1/or1ksim/testbench/mmu_asm.S
410	MMU test added.	simons	8235d 17h	/or1k/tags/stable_0_2_0_rc1/or1ksim/testbench/mmu_asm.S