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[/] [or1k/] [tags/] [stable_0_2_0_rc2/] [or1ksim/] [cpu/] [common/] [abstract.h] - Rev 1778

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1765 root 5598d 08h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/common/abstract.h
1611 This commit was manufactured by cvs2svn to create tag 'stable_0_2_0_rc2'. 6798d 17h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/common/abstract.h
1556 Create an 8-bit program load function to be able to load an unaligned section nogj 6880d 22h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/common/abstract.h
1549 Spelling fixes nogj 6942d 10h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/common/abstract.h
1539 Speed up the dmmu nogj 6943d 00h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/common/abstract.h
1538 Speed up the immu nogj 6943d 00h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/common/abstract.h
1525 Rename ADDR_PAGE to IADDR_PAGE nogj 6947d 19h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/common/abstract.h
1487 Remove useless *breakpoint argument from the {set,eval}_direct* functions nogj 6985d 22h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/common/abstract.h
1486 * Seporate out the code used for handling the memory peripheral to peripheral/memory.c
* Mostly decouple the memory controller from the internals of the memory handling.
* Rewrite memory handling to be more linear and thus much faster.
* Issue a bus error on read/write with invalid granularity.
nogj 6990d 19h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/common/abstract.h
1483 Remove fixed pagesize limitation from the recompiler nogj 7011d 11h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/common/abstract.h
1452 Implement a dynamic recompiler to speed up the execution nogj 7038d 14h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/common/abstract.h
1446 Cosmetic fixes nogj 7038d 14h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/common/abstract.h
1398 Correct incorrect calls to eval_direct8 nogj 7038d 15h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/common/abstract.h
1359 Pass private data in readfunc/writefunc callbacks nogj 7079d 09h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/common/abstract.h
1352 Optimise execution history tracking nogj 7088d 12h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/common/abstract.h
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7088d 13h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/common/abstract.h
1346 Remove the global op structure nogj 7101d 16h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/common/abstract.h
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7101d 16h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/common/abstract.h
1319 cpu/sim memory accesses separation, tick, exception, nr. of operands, cycles count,... corrections. phoenix 7205d 07h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/common/abstract.h
1308 Gyorgy Jeney: extensive cleanup phoenix 7293d 07h /or1k/tags/stable_0_2_0_rc2/or1ksim/cpu/common/abstract.h

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