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[/] [or1k/] [tags/] [stable_0_2_0_rc3/] [or1ksim/] [peripheral/] [atahost.h] - Rev 1778

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1765 root 5582d 04h /or1k/tags/stable_0_2_0_rc3/or1ksim/peripheral/atahost.h
1648 This commit was manufactured by cvs2svn to create tag 'stable_0_2_0_rc3'. 6729d 07h /or1k/tags/stable_0_2_0_rc3/or1ksim/peripheral/atahost.h
1646 This commit was manufactured by cvs2svn to create branch 'stable_0_2_x'. 6729d 07h /or1k/tags/stable_0_2_0_rc3/or1ksim/peripheral/atahost.h
1486 * Seporate out the code used for handling the memory peripheral to peripheral/memory.c
* Mostly decouple the memory controller from the internals of the memory handling.
* Rewrite memory handling to be more linear and thus much faster.
* Issue a bus error on read/write with invalid granularity.		 nogj 6974d 15h /or1k/tags/stable_0_2_0_rc3/or1ksim/peripheral/atahost.h
1461 Add an optional `enabled' paramter to every peripheral nogj 7022d 10h /or1k/tags/stable_0_2_0_rc3/or1ksim/peripheral/atahost.h
1364 Clean up the ata peripheral useing the new set of callbacks nogj 7063d 06h /or1k/tags/stable_0_2_0_rc3/or1ksim/peripheral/atahost.h
1359 Pass private data in readfunc/writefunc callbacks nogj 7063d 06h /or1k/tags/stable_0_2_0_rc3/or1ksim/peripheral/atahost.h
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7072d 09h /or1k/tags/stable_0_2_0_rc3/or1ksim/peripheral/atahost.h
1308 Gyorgy Jeney: extensive cleanup phoenix 7277d 03h /or1k/tags/stable_0_2_0_rc3/or1ksim/peripheral/atahost.h
919 stable release rherveille 7996d 08h /or1k/tags/stable_0_2_0_rc3/or1ksim/peripheral/atahost.h
876 Beta release of ATA simulation rherveille 8025d 04h /or1k/tags/stable_0_2_0_rc3/or1ksim/peripheral/atahost.h

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