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[/] [or1k/] [tags/] [stable_0_2_0_rc3/] [or1ksim/] [testbench/] [default.cfg] - Rev 1765

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1765 root 5569d 23h /or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/default.cfg
1648 This commit was manufactured by cvs2svn to create tag 'stable_0_2_0_rc3'. 6717d 03h /or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/default.cfg
1646 This commit was manufactured by cvs2svn to create branch 'stable_0_2_x'. 6717d 03h /or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/default.cfg
1568 Update config files nogj 6851d 06h /or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/default.cfg
1486 * Seporate out the code used for handling the memory peripheral to peripheral/memory.c
* Mostly decouple the memory controller from the internals of the memory handling.
* Rewrite memory handling to be more linear and thus much faster.
* Issue a bus error on read/write with invalid granularity.		 nogj 6962d 11h /or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/default.cfg
1424 Update the config files for the tests to the new format nogj 7010d 06h /or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/default.cfg
972 Interrupt suorces fixed. simons 7968d 09h /or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/default.cfg
970 Testbench is now running on ORP architecture platform. simons 7969d 01h /or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/default.cfg
730 tick section is now obsolete; update your .cfg files! markom 8130d 11h /or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/default.cfg
678 some minor improvements markom 8150d 07h /or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/default.cfg
677 executed log output looks nicer (and more correct :)) markom 8150d 08h /or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/default.cfg
645 simple frame buffer peripheral with test added markom 8160d 13h /or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/default.cfg
551 fsim runs 4 times faster than sim markom 8187d 07h /or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/default.cfg
549 enabled parameters removed from devices, which also have number of devices; command line --output-cfg parameter added markom 8187d 09h /or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/default.cfg
541 lot of new parameters concerning memory delays added; bpb parameter moved from cpu to new bpb section; UPDATE YOUR .CFG FILES! markom 8188d 09h /or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/default.cfg
532 removed stats 6 command, handling SLP; function profiling is supported by profiler; subroutine level parallelism is not covered yet, but should be done in profiler markom 8189d 13h /or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/default.cfg
424 memory configuration file joined into .cfg file; *mem.cfg are obsolete; read-only and write-only memory is supported; memory logging is not yet supported; update of testbench - only cache test fails, since it writes to RO memory markom 8216d 12h /or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/default.cfg
409 some minor changes to or1ksim; Testbench except.s modified. Interrupt test almost finished for uart ACV. markom 8221d 12h /or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/default.cfg
395 removed obsolete dependency and history from cpu section markom 8229d 14h /or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/default.cfg
380 all tests pass check markom 8230d 12h /or1k/tags/stable_0_2_0_rc3/or1ksim/testbench/default.cfg

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