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[/] [or1k/] [tags/] [tn_m001/] [or1ksim/] [bpb/] [branch_predict.c] - Rev 1778

Rev	Log message	Author	Age	Path
1765		root	5587d 15h	/or1k/tags/tn_m001/or1ksim/bpb/branch_predict.c
861	This commit was manufactured by cvs2svn to create tag 'tn_m001'.		8070d 15h	/or1k/tags/tn_m001/or1ksim/bpb/branch_predict.c
541	lot of new parameters concerning memory delays added; bpb parameter moved from cpu to new bpb section; UPDATE YOUR .CFG FILES!	markom	8206d 00h	/or1k/tags/tn_m001/or1ksim/bpb/branch_predict.c
306	corrected lots of bugs	markom	8267d 04h	/or1k/tags/tn_m001/or1ksim/bpb/branch_predict.c
264	updated cpu config section; added sim config section	markom	8272d 23h	/or1k/tags/tn_m001/or1ksim/bpb/branch_predict.c
102	Major update to include PM, PIC, Cache Mngmnt and non-interactive mode.	lampret	8441d 08h	/or1k/tags/tn_m001/or1ksim/bpb/branch_predict.c
28	Adding COFF loader.	lampret	8802d 12h	/or1k/tags/tn_m001/or1ksim/bpb/branch_predict.c
26	Clean up.	lampret	8818d 10h	/or1k/tags/tn_m001/or1ksim/bpb/branch_predict.c
6	Just a regular update with exception of cache simulation. MMU simulation still under development.	lampret	8882d 16h	/or1k/tags/tn_m001/or1ksim/bpb/branch_predict.c
3	This commit was generated by cvs2svn to compensate for changes in r2, which included commits to RCS files with non-trunk default branches.	cvs	9008d 09h	/or1k/tags/tn_m001/or1ksim/bpb/branch_predict.c
2	First import.	cvs	9008d 09h	/or1k/tags/tn_m001/or1ksim/bpb/branch_predict.c