OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [tn_m001/] [or1ksim/] [sim-config.h] - Rev 1778

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5577d 01h /or1k/tags/tn_m001/or1ksim/sim-config.h
861 This commit was manufactured by cvs2svn to create tag 'tn_m001'. 8060d 01h /or1k/tags/tn_m001/or1ksim/sim-config.h
823 Added configuration parameter for specifying stdout file filename. ivang 8096d 10h /or1k/tags/tn_m001/or1ksim/sim-config.h
805 kbd, fb, vga devices now uses scheduler markom 8103d 17h /or1k/tags/tn_m001/or1ksim/sim-config.h
732 Fixed error during merge. ivang 8136d 08h /or1k/tags/tn_m001/or1ksim/sim-config.h
731 Merge. ivang 8136d 09h /or1k/tags/tn_m001/or1ksim/sim-config.h
725 Added some more configuration parameters. ivang 8138d 08h /or1k/tags/tn_m001/or1ksim/sim-config.h
723 Added configuration for socket interface and IRQ level. ivang 8138d 09h /or1k/tags/tn_m001/or1ksim/sim-config.h
713 lot of small minor improvements: code documented, cleaned; runs at about same speed when not actually logging, but exe_log is enabled; raw_stats now run only with simple execution - enable RAW_USAGE_STATS macro markom 8140d 14h /or1k/tags/tn_m001/or1ksim/sim-config.h
675 register output added to sw executed log markom 8157d 12h /or1k/tags/tn_m001/or1ksim/sim-config.h
672 advanced exe_log functionality added markom 8157d 15h /or1k/tags/tn_m001/or1ksim/sim-config.h
664 very simple PS/2 keyboard model with associated test added markom 8160d 13h /or1k/tags/tn_m001/or1ksim/sim-config.h
648 fb now works in system memory markom 8166d 15h /or1k/tags/tn_m001/or1ksim/sim-config.h
647 some changes to fb to make it compatible with HW markom 8167d 10h /or1k/tags/tn_m001/or1ksim/sim-config.h
645 simple frame buffer peripheral with test added markom 8167d 15h /or1k/tags/tn_m001/or1ksim/sim-config.h
632 profiler and mprofiler merged into sim. ivang 8173d 03h /or1k/tags/tn_m001/or1ksim/sim-config.h
631 Real cache access is simulated now. simons 8174d 02h /or1k/tags/tn_m001/or1ksim/sim-config.h
629 typo fixed markom 8174d 14h /or1k/tags/tn_m001/or1ksim/sim-config.h
626 store buffer added markom 8174d 15h /or1k/tags/tn_m001/or1ksim/sim-config.h
624 Added logging of writes/read to/from SPR registers. ivang 8175d 07h /or1k/tags/tn_m001/or1ksim/sim-config.h

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.