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[/] [or1k/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_ctrl.v] - Rev 1773

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Rev Log message Author Age Path
1765 root 5716d 15h /or1k/trunk/or1200/rtl/verilog/or1200_ctrl.v
1339 revert to the old l.sfxxi behavior phoenix 7234d 03h /or1k/trunk/or1200/rtl/verilog/or1200_ctrl.v
1336 sign/zero extension for l.sfxxi instructions corrected andreje 7240d 05h /or1k/trunk/or1200/rtl/verilog/or1200_ctrl.v
1293 Non-functional changes. Coding style fixes. lampret 7452d 20h /or1k/trunk/or1200/rtl/verilog/or1200_ctrl.v
1284 Added some l.cust5 custom instructions as example lampret 7482d 18h /or1k/trunk/or1200/rtl/verilog/or1200_ctrl.v
1267 Merged branch_qmem into main tree. lampret 7517d 06h /or1k/trunk/or1200/rtl/verilog/or1200_ctrl.v
1159 No functional changes. Added defines to disable implementation of multiplier/MAC lampret 7864d 14h /or1k/trunk/or1200/rtl/verilog/or1200_ctrl.v
1032 Added optional SR[CY]. Added define to enable additional (compare) flag modifiers. Defines are OR1200_IMPL_ADDC and OR1200_ADDITIONAL_FLAG_MODIFIERS. lampret 8093d 08h /or1k/trunk/or1200/rtl/verilog/or1200_ctrl.v
788 Some of the warnings fixed. lampret 8254d 23h /or1k/trunk/or1200/rtl/verilog/or1200_ctrl.v
636 Fixed combinational loops. lampret 8310d 18h /or1k/trunk/or1200/rtl/verilog/or1200_ctrl.v
617 Changed 'void' nop-ops instead of insn[0] to use insn[16]. Debug unit stalls the tick timer. Prepared new flag generation for add and and insns. Blocked DC/IC while they are turned off. Fixed I/D MMU SPRs layout except WAYs. TODO: smart IC invalidate, l.j 2 and TLB ways. lampret 8315d 13h /or1k/trunk/or1200/rtl/verilog/or1200_ctrl.v
595 Fixed 'the NPC single-step fix'. lampret 8325d 00h /or1k/trunk/or1200/rtl/verilog/or1200_ctrl.v
562 Fixed mem2reg bug in FAST implementation. Updated debug unit to work with new genpc/if. lampret 8329d 08h /or1k/trunk/or1200/rtl/verilog/or1200_ctrl.v
504 New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs. lampret 8340d 06h /or1k/trunk/or1200/rtl/verilog/or1200_ctrl.v

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