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[/] [or1k/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_defines.v] - Rev 1765

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1765 root 5831d 15h /or1k/trunk/or1200/rtl/verilog/or1200_defines.v
1736 See OR1200_MAC_SHIFTBY in or1200_defines.v for explanation of the change. Since now no more 28 bits shift for l.macrc insns however for backward compatbility it is possible to set arbitry number of shifts. lampret 6898d 12h /or1k/trunk/or1200/rtl/verilog/or1200_defines.v
1582 Added support for RAMB16 Xilinx4/Spartan3 primitives jcastillo 7070d 02h /or1k/trunk/or1200/rtl/verilog/or1200_defines.v
1334 l.ff1 and l.cmov instructions added andreje 7355d 04h /or1k/trunk/or1200/rtl/verilog/or1200_defines.v
1293 Non-functional changes. Coding style fixes. lampret 7567d 19h /or1k/trunk/or1200/rtl/verilog/or1200_defines.v
1288 By default l.cust5 insns are disabled lampret 7597d 18h /or1k/trunk/or1200/rtl/verilog/or1200_defines.v
1284 Added some l.cust5 custom instructions as example lampret 7597d 18h /or1k/trunk/or1200/rtl/verilog/or1200_defines.v
1273 Add support for 512B instruction cache. simont 7629d 03h /or1k/trunk/or1200/rtl/verilog/or1200_defines.v
1267 Merged branch_qmem into main tree. lampret 7632d 05h /or1k/trunk/or1200/rtl/verilog/or1200_defines.v
1228 Exception prefix configuration changed to match branch_qmem configuration. simons 7713d 04h /or1k/trunk/or1200/rtl/verilog/or1200_defines.v
1200 mbist signals updated according to newest convention markom 7803d 06h /or1k/trunk/or1200/rtl/verilog/or1200_defines.v
1159 No functional changes. Added defines to disable implementation of multiplier/MAC lampret 7979d 13h /or1k/trunk/or1200/rtl/verilog/or1200_defines.v
1155 No functional change. Only added customization for exception vectors. lampret 7982d 15h /or1k/trunk/or1200/rtl/verilog/or1200_defines.v
1139 Fixed OR1200_CLKDIV_x_SUPPORTED defines. Better description. lampret 7995d 17h /or1k/trunk/or1200/rtl/verilog/or1200_defines.v
1132 RFRAM defines comments updated. Altera LPM option added. lampret 7996d 12h /or1k/trunk/or1200/rtl/verilog/or1200_defines.v
1104 Added optional support for WB B3 specification (xwb_cti_o, xwb_bte_o). Made xwb_cab_o optional. lampret 8116d 05h /or1k/trunk/or1200/rtl/verilog/or1200_defines.v
1078 Previous check-in was done by mistake. mohor 8156d 22h /or1k/trunk/or1200/rtl/verilog/or1200_defines.v
1077 Signal scanb_sen renamed to scanb_en. mohor 8156d 23h /or1k/trunk/or1200/rtl/verilog/or1200_defines.v
1063 Added BIST scan. Special VS RAMs need to be used to implement BIST. lampret 8167d 18h /or1k/trunk/or1200/rtl/verilog/or1200_defines.v
1055 Removed obsolete comment. lampret 8199d 10h /or1k/trunk/or1200/rtl/verilog/or1200_defines.v

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