URL https://opencores.org/ocsvn/or1k/or1k/trunk

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[/] [or1k/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_rf.v] - Rev 1765

Rev	Log message	Author	Age	Path
1765		root	5744d 07h	/or1k/trunk/or1200/rtl/verilog/or1200_rf.v
1130	RFRAM type always need to be defined.	lampret	7909d 04h	/or1k/trunk/or1200/rtl/verilog/or1200_rf.v
869	Added generic flip-flop based memory macro instantiation.	lampret	8211d 13h	/or1k/trunk/or1200/rtl/verilog/or1200_rf.v
504	New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs.	lampret	8367d 21h	/or1k/trunk/or1200/rtl/verilog/or1200_rf.v