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[/] [or1k/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_xcv_ram32x8d.v] - Rev 1779

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1765 root 5741d 17h /or1k/trunk/or1200/rtl/verilog/or1200_xcv_ram32x8d.v
895 Added simple trace buffer [only for Xilinx Virtex target]. Fixed instruction fetch abort when new exception is recognized. lampret 8172d 17h /or1k/trunk/or1200/rtl/verilog/or1200_xcv_ram32x8d.v
504 New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs. lampret 8365d 07h /or1k/trunk/or1200/rtl/verilog/or1200_xcv_ram32x8d.v

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