OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [or1ksim/] [cache/] [Makefile.in] - Rev 1765

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5741d 17h /or1k/trunk/or1ksim/cache/Makefile.in
1748 These are all the changes for Or1ksim 0.3.0 release candidate 1. The changes
are explained in the NEWS, README and ChangeLog files. A number of
long-standing bugs are fixed (see the OpenRISC tracker), and the code is
brought up to a consistent standard, following the GNU coding conventions
throughout.

Argument parsing now uses argtable2, and a User Guide has been added.
Documentation throughout has been extended to be compatible with Doxygen,
providing a further level of technical detail on the internals.		 jeremybennett 5890d 22h /or1k/trunk/or1ksim/cache/Makefile.in
1745 These are the changes to allow or1ksim to build as a library as well as a standalone simulator. The concept of a "generic" peripheral is added, which will commuicate with an external model via upcalls. jeremybennett 5926d 22h /or1k/trunk/or1ksim/cache/Makefile.in
1743 Changes to bring behavior into line with the current OpenRISC 1000 specification and support GDB 6.8. A couple of small bugs with handling xterms and opening the remote debug channel are also fixed. Header files have been added to sources in Makefile.am files where they are missing, so that "make tags" will include them. Makefile.in files have been regenerated due to these changes. jeremybennett 5927d 21h /or1k/trunk/or1ksim/cache/Makefile.in
1576 configure updates phoenix 7000d 17h /or1k/trunk/or1ksim/cache/Makefile.in
1376 aclocal && autoconf && automake phoenix 7216d 04h /or1k/trunk/or1ksim/cache/Makefile.in
1249 Downgrading back to automake-1.4 lampret 7601d 17h /or1k/trunk/or1ksim/cache/Makefile.in
1099 cvs bug fixed markom 8031d 04h /or1k/trunk/or1ksim/cache/Makefile.in
970 Testbench is now running on ORP architecture platform. simons 8140d 18h /or1k/trunk/or1ksim/cache/Makefile.in
876 Beta release of ATA simulation rherveille 8184d 17h /or1k/trunk/or1ksim/cache/Makefile.in
517 some performance optimizations markom 8364d 02h /or1k/trunk/or1ksim/cache/Makefile.in
221 major changes to testbench; debug unit is moved to /debug; memory organization can be customized; UART from simons; overall cleanup markom 8436d 05h /or1k/trunk/or1ksim/cache/Makefile.in
84 Update. lampret 8642d 02h /or1k/trunk/or1ksim/cache/Makefile.in
18 or16 added, or1k renamed to or32. lampret 8975d 08h /or1k/trunk/or1ksim/cache/Makefile.in
13 Rebuild of the generated files. jrydberg 9036d 00h /or1k/trunk/or1ksim/cache/Makefile.in
7 Major update of the enviorment. Now uses autoconf and automake. The
simulator uses readline aswell to get input from the user. A number of
new files added, some modified. The libc directory is now called support.		 jrydberg 9036d 00h /or1k/trunk/or1ksim/cache/Makefile.in

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.