OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [or1ksim/] [cpu/] [common/] [stats.h] - Rev 1765

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5738d 01h /or1k/trunk/or1ksim/cpu/common/stats.h
1751 These are the changes to support Or1ksim 0.3.0rc2. Most significantly they provide GDB RSP support. They also fix 5 outstanding bugs and satisfy one new feature request. jeremybennett 5857d 10h /or1k/trunk/or1ksim/cpu/common/stats.h
1748 These are all the changes for Or1ksim 0.3.0 release candidate 1. The changes
are explained in the NEWS, README and ChangeLog files. A number of
long-standing bugs are fixed (see the OpenRISC tracker), and the code is
brought up to a consistent standard, following the GNU coding conventions
throughout.

Argument parsing now uses argtable2, and a User Guide has been added.
Documentation throughout has been extended to be compatible with Doxygen,
providing a further level of technical detail on the internals.
jeremybennett 5887d 06h /or1k/trunk/or1ksim/cpu/common/stats.h
1428 Remove useless indirection: check_depend()->depend_operands() nogj 7178d 08h /or1k/trunk/or1ksim/cpu/common/stats.h
1244 Added "cm" command to copy data inside memory.
Make or1ksim work on little endian platforms.
Port to Mac OS X.
Some bugfixes.
Allow JTAG write access to read-only memory regions.
hpanther 7600d 09h /or1k/trunk/or1ksim/cpu/common/stats.h
535 stats is updated; statical single stats removed; t command output cleaned, added time output; cycles is moved to instructions; cycles now count time markom 8357d 09h /or1k/trunk/or1ksim/cpu/common/stats.h
532 removed stats 6 command, handling SLP; function profiling is supported by profiler; subroutine level parallelism is not covered yet, but should be done in profiler markom 8357d 15h /or1k/trunk/or1ksim/cpu/common/stats.h
77 Regular update. lampret 8791d 16h /or1k/trunk/or1ksim/cpu/common/stats.h
65 Added DMMU stats. lampret 8810d 16h /or1k/trunk/or1ksim/cpu/common/stats.h
34 Started with SLP (not finished yet). lampret 8934d 00h /or1k/trunk/or1ksim/cpu/common/stats.h
30 Updated SPRs, exceptions. Added 16450 device. lampret 8938d 01h /or1k/trunk/or1ksim/cpu/common/stats.h
24 Static branch prediction added. lampret 8968d 20h /or1k/trunk/or1ksim/cpu/common/stats.h
6 Just a regular update with exception of cache simulation. MMU simulation still under development. lampret 9033d 02h /or1k/trunk/or1ksim/cpu/common/stats.h
3 This commit was generated by cvs2svn to compensate for changes in r2, which
included commits to RCS files with non-trunk default branches.
cvs 9158d 20h /or1k/trunk/or1ksim/cpu/common/stats.h
2 First import. cvs 9158d 20h /or1k/trunk/or1ksim/cpu/common/stats.h

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.