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[/] [or1k/] [trunk/] [or1ksim/] [testbench/] [except.S] - Rev 1765

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Rev Log message Author Age Path
1765 root 5741d 16h /or1k/trunk/or1ksim/testbench/except.S
970 Testbench is now running on ORP architecture platform. simons 8140d 17h /or1k/trunk/or1ksim/testbench/except.S
957 Flash at 0x04000000 RAM at 0x00000000. Only MMU test works. simons 8142d 19h /or1k/trunk/or1ksim/testbench/except.S
956 Changed to work with or32-uclinux tool chain. Everything works except keyboard test. simons 8142d 23h /or1k/trunk/or1ksim/testbench/except.S
600 No more low/high priority interrupts (PICPR removed). Added tick timer exception. simons 8348d 16h /or1k/trunk/or1ksim/testbench/except.S
475 l.jalr r9 is not used any more. simons 8380d 02h /or1k/trunk/or1ksim/testbench/except.S
461 DTLBMISS and DPF exceptions are fixed in simulator. simons 8381d 16h /or1k/trunk/or1ksim/testbench/except.S
441 Two instructions removed from reset wrapper to save space. simons 8387d 00h /or1k/trunk/or1ksim/testbench/except.S
436 Copying from flash to ram only when there is 0xff on address 0. simons 8387d 01h /or1k/trunk/or1ksim/testbench/except.S
413 some section changes markom 8392d 01h /or1k/trunk/or1ksim/testbench/except.S
410 MMU test added. simons 8392d 23h /or1k/trunk/or1ksim/testbench/except.S
409 some minor changes to or1ksim; Testbench except.s modified. Interrupt test almost finished for uart ACV. markom 8393d 05h /or1k/trunk/or1ksim/testbench/except.S
371 steps toward joining or32.c and opcode/or32.h of or1ksim and gdb; decode.c moved to or32.c markom 8403d 05h /or1k/trunk/or1ksim/testbench/except.S
344 added acv test for uart; sim debug now has verbose levels; lot of bugs fixed in uart model markom 8415d 03h /or1k/trunk/or1ksim/testbench/except.S
342 added exception vectors to support and modified section names markom 8416d 02h /or1k/trunk/or1ksim/testbench/except.S

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