URL https://opencores.org/ocsvn/or1k/or1k/trunk

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[/] [or1k/] [trunk/] [or1ksim/] [testbench/] [mmu_asm.S] - Rev 1775

Rev	Log message	Author	Age	Path
1765		root	5717d 23h	/or1k/trunk/or1ksim/testbench/mmu_asm.S
639	MMU cache inhibit bit test added.	simons	8312d 00h	/or1k/trunk/or1ksim/testbench/mmu_asm.S
600	No more low/high priority interrupts (PICPR removed). Added tick timer exception.	simons	8324d 23h	/or1k/trunk/or1ksim/testbench/mmu_asm.S
475	l.jalr r9 is not used any more.	simons	8356d 09h	/or1k/trunk/or1ksim/testbench/mmu_asm.S
415	DTLB test tested on simulator.	simons	8367d 22h	/or1k/trunk/or1ksim/testbench/mmu_asm.S
413	some section changes	markom	8368d 08h	/or1k/trunk/or1ksim/testbench/mmu_asm.S
410	MMU test added.	simons	8369d 05h	/or1k/trunk/or1ksim/testbench/mmu_asm.S