URL https://opencores.org/ocsvn/or1k_old/or1k_old/trunk

Subversion Repositories or1k_old

[/] [or1k_old/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_mult_mac.v] - Rev 1782

Rev	Log message	Author	Age	Path
1782		root	5527d 22h	/or1k_old/trunk/or1200/rtl/verilog/or1200_mult_mac.v
1765		root	5638d 14h	/or1k_old/trunk/or1200/rtl/verilog/or1200_mult_mac.v
1736	See OR1200_MAC_SHIFTBY in or1200_defines.v for explanation of the change. Since now no more 28 bits shift for l.macrc insns however for backward compatbility it is possible to set arbitry number of shifts.	lampret	6705d 11h	/or1k_old/trunk/or1200/rtl/verilog/or1200_mult_mac.v
1293	Non-functional changes. Coding style fixes.	lampret	7374d 19h	/or1k_old/trunk/or1200/rtl/verilog/or1200_mult_mac.v
1159	No functional changes. Added defines to disable implementation of multiplier/MAC	lampret	7786d 13h	/or1k_old/trunk/or1200/rtl/verilog/or1200_mult_mac.v
1035	Added optional l.div/l.divu insns. By default they are disabled.	lampret	8014d 07h	/or1k_old/trunk/or1200/rtl/verilog/or1200_mult_mac.v
504	New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs.	lampret	8262d 05h	/or1k_old/trunk/or1200/rtl/verilog/or1200_mult_mac.v