OpenCores
URL https://opencores.org/ocsvn/or1k_old/or1k_old/trunk

Subversion Repositories or1k_old

[/] [or1k_old/] [trunk/] [or1ksim/] [Makefile.am] - Rev 1782

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
1782 root 5614d 06h /or1k_old/trunk/or1ksim/Makefile.am
1765 root 5724d 22h /or1k_old/trunk/or1ksim/Makefile.am
1748 These are all the changes for Or1ksim 0.3.0 release candidate 1. The changes
are explained in the NEWS, README and ChangeLog files. A number of
long-standing bugs are fixed (see the OpenRISC tracker), and the code is
brought up to a consistent standard, following the GNU coding conventions
throughout.

Argument parsing now uses argtable2, and a User Guide has been added.
Documentation throughout has been extended to be compatible with Doxygen,
providing a further level of technical detail on the internals.
jeremybennett 5874d 03h /or1k_old/trunk/or1ksim/Makefile.am
1745 These are the changes to allow or1ksim to build as a library as well as a standalone simulator. The concept of a "generic" peripheral is added, which will commuicate with an external model via upcalls. jeremybennett 5910d 02h /or1k_old/trunk/or1ksim/Makefile.am
1353 Modularise simulator command parsing nogj 7215d 02h /or1k_old/trunk/or1ksim/Makefile.am
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7215d 03h /or1k_old/trunk/or1ksim/Makefile.am
1242 Added "cm" command to copy data inside memory.
Make or1ksim work on little endian platforms.
Port to Mac OS X.
Some bugfixes.
Allow JTAG write access to read-only memory regions.
hpanther 7587d 06h /or1k_old/trunk/or1ksim/Makefile.am
1075 channels integration rprescott 8050d 23h /or1k_old/trunk/or1ksim/Makefile.am
879 Initial version of OpenRISC Custom Unit Compiler added markom 8166d 04h /or1k_old/trunk/or1ksim/Makefile.am
646 some bugs fixed markom 8315d 08h /or1k_old/trunk/or1ksim/Makefile.am
632 profiler and mprofiler merged into sim. ivang 8320d 23h /or1k_old/trunk/or1ksim/Makefile.am
547 memory profiler added markom 8342d 11h /or1k_old/trunk/or1ksim/Makefile.am
306 corrected lots of bugs markom 8404d 10h /or1k_old/trunk/or1ksim/Makefile.am
241 "make install" now works markom 8418d 11h /or1k_old/trunk/or1ksim/Makefile.am
221 major changes to testbench; debug unit is moved to /debug; memory organization can be customized; UART from simons; overall cleanup markom 8419d 10h /or1k_old/trunk/or1ksim/Makefile.am
173 - profiler added, use e.g.:
make profiler
./sim -profile -fast executable
./profiler -g [-c]

(no special compiling options necessary)
markom 8490d 14h /or1k_old/trunk/or1ksim/Makefile.am
123 Bugs fixed:
- l.rfe temporarly disables exceptions
- l.sys does PC -= 4
- breakpoints now supported at peripheria locations
- uart0.rt/.tx nonexistent file segment fault

Other modifications:
- replaced string names to instruction indexes
- execute.c executes specified (in ISA table) function
- modified ISA table - flag needed for gdb
- added or32.c, which supports or32.h
- added new instructions l.mac, l.msb, l.maci, l.macrc
and their executing functions (opcodes to be revisited)
- added header acconfig.h
- modified configuration files
markom 8553d 07h /or1k_old/trunk/or1ksim/Makefile.am
103 Major update to include PM, PIC, Cache Mngmnt and non-interactive mode. lampret 8578d 15h /or1k_old/trunk/or1ksim/Makefile.am
92 Tick timer. lampret 8623d 22h /or1k_old/trunk/or1ksim/Makefile.am
30 Updated SPRs, exceptions. Added 16450 device. lampret 8924d 22h /or1k_old/trunk/or1ksim/Makefile.am

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.