URL https://opencores.org/ocsvn/or1k_old/or1k_old/trunk

Subversion Repositories or1k_old

[/] [or1k_old/] [trunk/] [orp/] [orp_soc/] [rtl/] [verilog/] [xsv_fpga_defines.v] - Rev 1782

Rev	Log message	Author	Age	Path
1782		root	5735d 06h	/or1k_old/trunk/orp/orp_soc/rtl/verilog/xsv_fpga_defines.v
1765		root	5845d 22h	/or1k_old/trunk/orp/orp_soc/rtl/verilog/xsv_fpga_defines.v
1268	Merged branch_qmem into main tree.	lampret	7646d 12h	/or1k_old/trunk/orp/orp_soc/rtl/verilog/xsv_fpga_defines.v
1191	disabled 'bench_defines.v' during synthesis + added define to specify usage of flash instruction address	dries	7852d 13h	/or1k_old/trunk/orp/orp_soc/rtl/verilog/xsv_fpga_defines.v
797	Changed hardcoded address for fake MC to use a define.	lampret	8384d 00h	/or1k_old/trunk/orp/orp_soc/rtl/verilog/xsv_fpga_defines.v
746	First import of the "new" XESS XSV environment.	lampret	8392d 04h	/or1k_old/trunk/orp/orp_soc/rtl/verilog/xsv_fpga_defines.v