URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [asyst_3/] [rtl/] [verilog/] [pci_pcir_fifo_control.v] - Rev 154

Rev	Log message	Author	Age	Path
154	New directory structure.	root	5613d 10h	/pci/tags/asyst_3/rtl/verilog/pci_pcir_fifo_control.v
134	This commit was manufactured by cvs2svn to create tag 'asyst_3'.		7521d 07h	/pci/tags/asyst_3/rtl/verilog/pci_pcir_fifo_control.v
111	synchronizer_flop replaced with pci_synchronizer_flop, artisan ram instance updated.	simons	7648d 05h	/pci/tags/asyst_3/rtl/verilog/pci_pcir_fifo_control.v
104	Found and simulated the problem in the synchronization logic. Repaired the synchronization logic in the FIFOs.	mihad	7664d 10h	/pci/tags/asyst_3/rtl/verilog/pci_pcir_fifo_control.v
88	Added the reset value parameter to the synchronizer flop module. Added resets to all synchronizer flop instances. Repaired initial sync value in fifos.	mihad	7789d 05h	/pci/tags/asyst_3/rtl/verilog/pci_pcir_fifo_control.v
77	Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed.	mihad	7847d 01h	/pci/tags/asyst_3/rtl/verilog/pci_pcir_fifo_control.v