URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_00/] [rtl/] [verilog/] [pci_target32_trdy_crit.v] - Rev 154

Rev	Log message	Author	Age	Path
154	New directory structure.	root	5578d 07h	/pci/tags/rel_00/rtl/verilog/pci_target32_trdy_crit.v
41	This commit was manufactured by cvs2svn to create tag 'rel_00'.		8069d 20h	/pci/tags/rel_00/rtl/verilog/pci_target32_trdy_crit.v
21	Repaired a few bugs, updated specification, added test bench files and design document	mihad	8172d 00h	/pci/tags/rel_00/rtl/verilog/pci_target32_trdy_crit.v
6	Updated all files with inclusion of timescale file for simulation purposes.	mihad	8291d 07h	/pci/tags/rel_00/rtl/verilog/pci_target32_trdy_crit.v
2	New project directory structure	mihad	8293d 23h	/pci/tags/rel_00/rtl/verilog/pci_target32_trdy_crit.v