URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_13/] [rtl/] [verilog/] [pci_wbw_wbr_fifos.v] - Rev 154

Rev	Log message	Author	Age	Path
154	New directory structure.	root	5599d 09h	/pci/tags/rel_13/rtl/verilog/pci_wbw_wbr_fifos.v
135	This commit was manufactured by cvs2svn to create tag 'rel_13'.		7507d 07h	/pci/tags/rel_13/rtl/verilog/pci_wbw_wbr_fifos.v
132	Compact PCI Hot Swap support added. New testcases added. Specification updated. Test application changed to support WB B3 cycles.	mihad	7507d 07h	/pci/tags/rel_13/rtl/verilog/pci_wbw_wbr_fifos.v
122	mbist signals updated according to newest convention	markom	7570d 09h	/pci/tags/rel_13/rtl/verilog/pci_wbw_wbr_fifos.v
111	synchronizer_flop replaced with pci_synchronizer_flop, artisan ram instance updated.	simons	7634d 05h	/pci/tags/rel_13/rtl/verilog/pci_wbw_wbr_fifos.v
88	Added the reset value parameter to the synchronizer flop module. Added resets to all synchronizer flop instances. Repaired initial sync value in fifos.	mihad	7775d 05h	/pci/tags/rel_13/rtl/verilog/pci_wbw_wbr_fifos.v
81	Updated synchronization in top level fifo modules.	mihad	7829d 20h	/pci/tags/rel_13/rtl/verilog/pci_wbw_wbr_fifos.v
77	Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed.	mihad	7833d 01h	/pci/tags/rel_13/rtl/verilog/pci_wbw_wbr_fifos.v