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[/] [pci/] [tags/] [rel_6/] [rtl/] [verilog/] [bus_commands.v] - Rev 154

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Rev Log message Author Age Path
154 New directory structure. root 5576d 22h /pci/tags/rel_6/rtl/verilog/bus_commands.v
112 This commit was manufactured by cvs2svn to create tag 'rel_6'. 7611d 17h /pci/tags/rel_6/rtl/verilog/bus_commands.v
53 Updated for synthesis purposes. Gate level simulation was failing in some configurations mihad 7968d 17h /pci/tags/rel_6/rtl/verilog/bus_commands.v
21 Repaired a few bugs, updated specification, added test bench files and design document mihad 8170d 15h /pci/tags/rel_6/rtl/verilog/bus_commands.v
6 Updated all files with inclusion of timescale file for simulation purposes. mihad 8289d 22h /pci/tags/rel_6/rtl/verilog/bus_commands.v
2 New project directory structure mihad 8292d 15h /pci/tags/rel_6/rtl/verilog/bus_commands.v

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