URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_8/] [rtl/] [verilog/] [pci_master32_sm.v] - Rev 154

Rev	Log message	Author	Age	Path
154	New directory structure.	root	5589d 01h	/pci/tags/rel_8/rtl/verilog/pci_master32_sm.v
120	This commit was manufactured by cvs2svn to create tag 'rel_8'.		7616d 12h	/pci/tags/rel_8/rtl/verilog/pci_master32_sm.v
77	Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed.	mihad	7822d 17h	/pci/tags/rel_8/rtl/verilog/pci_master32_sm.v
73	Bug fixes, testcases added.	mihad	7828d 17h	/pci/tags/rel_8/rtl/verilog/pci_master32_sm.v
21	Repaired a few bugs, updated specification, added test bench files and design document	mihad	8182d 18h	/pci/tags/rel_8/rtl/verilog/pci_master32_sm.v
6	Updated all files with inclusion of timescale file for simulation purposes.	mihad	8302d 01h	/pci/tags/rel_8/rtl/verilog/pci_master32_sm.v
2	New project directory structure	mihad	8304d 18h	/pci/tags/rel_8/rtl/verilog/pci_master32_sm.v